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204 Commits
Author SHA1 Message Date
Youmu Liu b59d414e20 Remove hlsf, TLSF.alloc is ok 2026-05-11 18:08:35 +08:00
Nitload 8105af6ca3 Update on 20260511-001810 by Nitload Youmu. Additional Message : Abort HLSF design, use a non-standard TLSF as instead 
Signed-off-by: Nitload <YoumuLiu_NSI@whv0t.onmicrosoft.com>
 2026-05-11 00:18:10 +08:00
Nitload 5e73469c2e after merge 2026-05-10 06:39:52 +08:00
Youmu Liu 9234dbe99b Abort hlsf, goes back to tlsf, may use 'Arena-ed tlsf' 2026-05-09 18:27:34 +08:00
Youmu Liu 942933dcac Abort hlsf, goes back to tlsf, may use 'Arena-ed tlsf' 2026-05-09 18:18:57 +08:00
Youmu Liu d1aca8f745 hlsf goes bad 2026-05-08 18:09:12 +08:00
Youmu Liu 8aa319a120 going on reconstruct of HLSF 2026-05-07 18:03:33 +08:00
Youmu Liu c343e763ed before rewrite of HLSF 2026-05-07 11:16:41 +08:00
Nitload 156f6afe85 after merge 2026-05-04 17:25:01 +08:00
Nitload e1167bb071 before merge 2026-05-04 17:22:29 +08:00
Youmu Liu ae664cb541 matrix parallel start to use two different policy 2026-04-27 20:08:10 +08:00
Youmu Liu ecb1f04770 matrix thread pool use ParaWaveFront and heavy sync 2026-04-26 17:38:10 +08:00
Youmu Liu 2f6617447c L4 is now on new algo, using tricky way to init entryies 2026-04-23 18:07:14 +08:00
Youmu Liu 1a6ce24a27 L4 is now on new algo, using new eviction arrays, using union of hlsf and cache line head. 2026-04-23 17:39:38 +08:00
Youmu Liu 5252be9436 L4 removes RRPV array, will not support cross-predictor reuse, will use out-line predictcount and map count array, will not use inline predict count. 2026-04-22 18:11:00 +08:00
Youmu Liu 4f3e206dcb HLSf use nuint rather than long, L4 now uses hlsf rather than array to alloc cache line. 2026-04-21 20:32:28 +08:00
Youmu Liu 2e2d64a2ce HLSf use nuint rather than long, L4 now uses hlsf rather than array to alloc cache line. 2026-04-20 18:10:14 +08:00
Youmu Liu 1b7c929be4 Merge branch 'main' of https://github.com/Nitload-NSI/CCD_Github into local 
Merge from main branch.
 2026-04-20 13:31:40 +08:00
Youmu Liu 501bd583e2 before merge 2026-04-20 13:31:36 +08:00
Nitload 5fc8e62f28 solution to length unfixed cacheline in l4 2026-04-19 02:30:35 +08:00
Youmu Liu 2203a46eb7 can create and retire matrix thread by numa infomation 2026-04-15 18:08:08 +08:00
Youmu Liu fdf11c729f find a way to create Thread binded to LogicalCore properly 2026-04-14 18:08:22 +08:00
Youmu Liu b07013a003 find a way to create Thread binded to LogicalCore properly 2026-04-13 19:01:28 +08:00
Nitload 61a5b49c22 solution to unsafe operation in l4 2026-04-13 00:12:29 +08:00
Nitload 556008ad8c L4 is now very unsafe 2026-04-12 23:55:18 +08:00
Youmu Liu 9aa096dc63 L4 completely add support for multi predictor, working on ver 5 mat para 2026-04-10 18:06:08 +08:00
Youmu Liu 8a66c1697a L4 completely add support for multi predictor, working on ver 5 mat para 2026-04-10 18:05:40 +08:00
Youmu Liu b5bee5c442 fix M512 member index bug 2026-04-09 18:10:11 +08:00
Youmu Liu f7187ca7fd add multi predictor support to l4, working for ver 5 of mat parallel 2026-04-09 18:07:49 +08:00
Youmu Liu 0bad6bb480 few changed 2026-04-08 18:21:00 +08:00
Youmu Liu 94a3127c0d small changed 2026-04-07 18:08:34 +08:00
Youmu Liu 2f74e5e8a9 add startup numa sense 2026-04-02 18:13:32 +08:00
Nitload 24498c2717 matrix pool init ok, working on task publish 2026-03-30 01:42:09 +08:00
Youmu Liu 06e3aa119b mat 2026-03-26 18:02:13 +08:00
Nitload dcc2bb699a merge to main stream 2026-03-19 22:03:30 +08:00
Youmu Liu e3f2cf989d L4 briefly pass unit test 2026-03-18 17:53:28 +08:00
Nitload af594c04ea L4 briefly ok 2026-03-18 00:33:35 +08:00
Youmu Liu dccb815811 L4 briefly pass unit test 2026-03-17 20:31:06 +08:00
Nitload 98d711a3ca fix sever L4 errors 2026-03-17 00:31:52 +08:00
Youmu Liu f8a879c4da fix severe bug 2026-03-16 18:27:32 +08:00
Nitload 8e6dfa7211 temp 2026-03-16 07:15:19 +08:00
Youmu Liu ccf95ec270 L4 brief ok 2026-03-13 18:04:36 +08:00
Youmu Liu 5da448548b L4 brief ok 2026-03-13 17:39:40 +08:00
Youmu Liu c1c1a16627 some chore 2026-03-12 18:13:41 +08:00
Nitload 0c1887d8f8 Daily update on 20260312-004950 by Nitload Youmu. Additional Message : use one single index mux as replacement of two slab allocators for L4. 
Signed-off-by: Nitload <YoumuLiu_NSI@whv0t.onmicrosoft.com>
 2026-03-12 00:49:50 +08:00
Youmu Liu 9b5dfec9d5 some chore 2026-03-11 18:55:45 +08:00
Youmu Liu c842f72934 l4 switch to RRPV eviction 2026-03-11 09:00:51 +08:00
Nitload 3f2b1fcd97 working on L4 2026-03-10 00:23:01 +08:00
Youmu Liu d97fb1dd90 l4 handle 2026-03-09 18:14:49 +08:00
Nitload ae8238fca2 Daily update on 20260308-235635 by Nitload Youmu. Additional Message : designing types for L4 function mosule 
Signed-off-by: Nitload <YoumuLiu_NSI@whv0t.onmicrosoft.com>
 2026-03-08 23:56:35 +08:00