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stgsharp/obj/StgSharp.Native/Debug/x64/simdid_compare.x86.cod
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2026-02-28 18:08:26 +08:00

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; Listing generated by Microsoft (R) Optimizing Compiler Version 19.44.35220.0
include listing.inc
INCLUDELIB MSVCRTD
INCLUDELIB OLDNAMES
_DATA SEGMENT
COMM infolog:BYTE:0200H
_DATA ENDS
msvcjmc SEGMENT
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__36E6045D_simdid_compare@x86@c DB 01H
msvcjmc ENDS
CONST SEGMENT
impl_strength_table DD 01H
DD 00H
DD 02H
DD 01H
CONST ENDS
PUBLIC sn_get_unite_simd
PUBLIC sn_compare_simd
PUBLIC __JustMyCode_Default
EXTRN _RTC_CheckStackVars:PROC
EXTRN _RTC_InitBase:PROC
EXTRN _RTC_Shutdown:PROC
EXTRN __CheckForDebuggerJustMyCode:PROC
; COMDAT pdata
pdata SEGMENT
$pdata$sn_get_unite_simd DD imagerel $LN9
DD imagerel $LN9+899
DD imagerel $unwind$sn_get_unite_simd
pdata ENDS
; COMDAT pdata
pdata SEGMENT
$pdata$sn_compare_simd DD imagerel $LN34
DD imagerel $LN34+1037
DD imagerel $unwind$sn_compare_simd
pdata ENDS
; COMDAT pdata
pdata SEGMENT
$pdata$popcount16 DD imagerel popcount16
DD imagerel popcount16+100
DD imagerel $unwind$popcount16
pdata ENDS
; COMDAT pdata
pdata SEGMENT
$pdata$impl_strength DD imagerel impl_strength
DD imagerel impl_strength+71
DD imagerel $unwind$impl_strength
pdata ENDS
; COMDAT rtc$TMZ
rtc$TMZ SEGMENT
_RTC_Shutdown.rtc$TMZ DQ FLAT:_RTC_Shutdown
rtc$TMZ ENDS
; COMDAT rtc$IMZ
rtc$IMZ SEGMENT
_RTC_InitBase.rtc$IMZ DQ FLAT:_RTC_InitBase
rtc$IMZ ENDS
; COMDAT xdata
xdata SEGMENT
$unwind$impl_strength DD 025051301H
DD 010e2313H
DD 070070021H
DD 05006H
xdata ENDS
; COMDAT xdata
xdata SEGMENT
$unwind$popcount16 DD 025051301H
DD 010e2313H
DD 070070021H
DD 05006H
xdata ENDS
; COMDAT xdata
xdata SEGMENT
$unwind$sn_compare_simd DD 025051801H
DD 01132318H
DD 0700c0085H
DD 0500bH
xdata ENDS
; COMDAT xdata
xdata SEGMENT
$unwind$sn_get_unite_simd DD 025053101H
DD 01132318H
DD 0700c005dH
DD 0500bH
xdata ENDS
; COMDAT CONST
CONST SEGMENT
sn_get_unite_simd$rtcName$0 DB 06fH
DB 075H
DB 074H
DB 00H
ORG $+12
sn_get_unite_simd$rtcVarDesc DD 028H
DD 08H
DQ FLAT:sn_get_unite_simd$rtcName$0
ORG $+48
sn_get_unite_simd$rtcFrameData DD 01H
DD 00H
DQ FLAT:sn_get_unite_simd$rtcVarDesc
CONST ENDS
; Function compile flags: /Odt
; COMDAT __JustMyCode_Default
_TEXT SEGMENT
__JustMyCode_Default PROC ; COMDAT
00000 c2 00 00 ret 0
__JustMyCode_Default ENDP
_TEXT ENDS
; Function compile flags: /Odtp /RTCsu /ZI
; File D:\platform-dev\StgSharp.Native\sn-src\simdid_compare.x86.c
; COMDAT impl_strength
_TEXT SEGMENT
impl$ = 4
avx512$ = 256
impl_strength PROC ; COMDAT
; 48 : {
00000 66 89 4c 24 08 mov WORD PTR [rsp+8], cx
00005 55 push rbp
00006 57 push rdi
00007 48 81 ec 08 01
00 00 sub rsp, 264 ; 00000108H
0000e 48 8d 6c 24 20 lea rbp, QWORD PTR [rsp+32]
00013 48 8d 0d 00 00
00 00 lea rcx, OFFSET FLAT:__36E6045D_simdid_compare@x86@c
0001a e8 00 00 00 00 call __CheckForDebuggerJustMyCode
0001f 90 npad 1
; 49 : unsigned impl = (avx512 >> SIMDID_AVX512_IMPL_SHIFT) & 0x3u;
00020 0f b7 85 00 01
00 00 movzx eax, WORD PTR avx512$[rbp]
00027 c1 f8 06 sar eax, 6
0002a 83 e0 03 and eax, 3
0002d 89 45 04 mov DWORD PTR impl$[rbp], eax
; 50 : return impl_strength_table[impl];
00030 8b 45 04 mov eax, DWORD PTR impl$[rbp]
00033 48 8d 0d 00 00
00 00 lea rcx, OFFSET FLAT:impl_strength_table
0003a 8b 04 81 mov eax, DWORD PTR [rcx+rax*4]
; 51 : }
0003d 48 8d a5 e8 00
00 00 lea rsp, QWORD PTR [rbp+232]
00044 5f pop rdi
00045 5d pop rbp
00046 c3 ret 0
impl_strength ENDP
_TEXT ENDS
; Function compile flags: /Odtp /RTCsu /ZI
; File D:\platform-dev\StgSharp.Native\sn-src\simdid_compare.x86.c
; COMDAT popcount16
_TEXT SEGMENT
c$ = 4
v$ = 256
popcount16 PROC ; COMDAT
; 33 : {
00000 66 89 4c 24 08 mov WORD PTR [rsp+8], cx
00005 55 push rbp
00006 57 push rdi
00007 48 81 ec 08 01
00 00 sub rsp, 264 ; 00000108H
0000e 48 8d 6c 24 20 lea rbp, QWORD PTR [rsp+32]
00013 48 8d 0d 00 00
00 00 lea rcx, OFFSET FLAT:__36E6045D_simdid_compare@x86@c
0001a e8 00 00 00 00 call __CheckForDebuggerJustMyCode
0001f 90 npad 1
; 34 : int c = 0;
00020 c7 45 04 00 00
00 00 mov DWORD PTR c$[rbp], 0
$LN2@popcount16:
; 35 : while (v) {
00027 0f b7 85 00 01
00 00 movzx eax, WORD PTR v$[rbp]
0002e 85 c0 test eax, eax
00030 74 25 je SHORT $LN3@popcount16
; 36 : v &= v - 1;
00032 0f b7 85 00 01
00 00 movzx eax, WORD PTR v$[rbp]
00039 ff c8 dec eax
0003b 0f b7 8d 00 01
00 00 movzx ecx, WORD PTR v$[rbp]
00042 23 c8 and ecx, eax
00044 8b c1 mov eax, ecx
00046 66 89 85 00 01
00 00 mov WORD PTR v$[rbp], ax
; 37 : c++;
0004d 8b 45 04 mov eax, DWORD PTR c$[rbp]
00050 ff c0 inc eax
00052 89 45 04 mov DWORD PTR c$[rbp], eax
; 38 : }
00055 eb d0 jmp SHORT $LN2@popcount16
$LN3@popcount16:
; 39 : return c;
00057 8b 45 04 mov eax, DWORD PTR c$[rbp]
; 40 : }
0005a 48 8d a5 e8 00
00 00 lea rsp, QWORD PTR [rbp+232]
00061 5f pop rdi
00062 5d pop rbp
00063 c3 ret 0
popcount16 ENDP
_TEXT ENDS
; Function compile flags: /Odtp /RTCsu /ZI
; File D:\platform-dev\StgSharp.Native\sn-src\simdid_compare.x86.c
; COMDAT sn_compare_simd
_TEXT SEGMENT
lm$ = 4
rm$ = 36
la$1 = 68
ra$2 = 100
l512$3 = 132
r512$4 = 164
lb$5 = 196
rb$6 = 228
drop$7 = 260
ext_mask$8 = 292
lp$9 = 324
rp$10 = 356
ls$11 = 388
rs$12 = 420
lu$ = 452
ru$ = 484
lt$ = 516
rt$ = 548
ld$ = 580
rd$ = 612
tv191 = 1012
tv72 = 1012
tv82 = 1012
tv137 = 1012
tv141 = 1012
tv144 = 1012
tv164 = 1012
tv171 = 1012
tv182 = 1012
tv185 = 1012
tv188 = 1012
left$ = 1056
right$ = 1064
sn_compare_simd PROC ; COMDAT
; 157 : {
$LN34:
00000 48 89 54 24 10 mov QWORD PTR [rsp+16], rdx
00005 48 89 4c 24 08 mov QWORD PTR [rsp+8], rcx
0000a 55 push rbp
0000b 57 push rdi
0000c 48 81 ec 28 04
00 00 sub rsp, 1064 ; 00000428H
00013 48 8d 6c 24 20 lea rbp, QWORD PTR [rsp+32]
00018 48 8d 0d 00 00
00 00 lea rcx, OFFSET FLAT:__36E6045D_simdid_compare@x86@c
0001f e8 00 00 00 00 call __CheckForDebuggerJustMyCode
00024 90 npad 1
; 158 : /* 1. MainLevel */
; 159 : unsigned lm = FIELD_MAIN(left);
00025 b8 01 00 00 00 mov eax, 1
0002a 48 6b c0 01 imul rax, rax, 1
0002e 0f b6 84 05 20
04 00 00 movzx eax, BYTE PTR left$[rbp+rax]
00036 89 45 04 mov DWORD PTR lm$[rbp], eax
; 160 : unsigned rm = FIELD_MAIN(right);
00039 b8 01 00 00 00 mov eax, 1
0003e 48 6b c0 01 imul rax, rax, 1
00042 0f b6 84 05 28
04 00 00 movzx eax, BYTE PTR right$[rbp+rax]
0004a 89 45 24 mov DWORD PTR rm$[rbp], eax
; 161 : if (lm != rm)
0004d 8b 45 24 mov eax, DWORD PTR rm$[rbp]
00050 39 45 04 cmp DWORD PTR lm$[rbp], eax
00053 74 29 je SHORT $LN2@sn_compare
; 162 : return lm > rm ? 1 : -1;
00055 8b 45 24 mov eax, DWORD PTR rm$[rbp]
00058 39 45 04 cmp DWORD PTR lm$[rbp], eax
0005b 76 0c jbe SHORT $LN12@sn_compare
0005d c7 85 f4 03 00
00 01 00 00 00 mov DWORD PTR tv72[rbp], 1
00067 eb 0a jmp SHORT $LN13@sn_compare
$LN12@sn_compare:
00069 c7 85 f4 03 00
00 ff ff ff ff mov DWORD PTR tv72[rbp], -1
$LN13@sn_compare:
00073 8b 85 f4 03 00
00 mov eax, DWORD PTR tv72[rbp]
00079 e9 85 03 00 00 jmp $LN1@sn_compare
$LN2@sn_compare:
; 163 :
; 164 : /* 2. AVX10 width (only when MainLevel == AVX10) */
; 165 : if (lm >= SIMDID_MAIN_LVL_AVX10) {
0007e 83 7d 04 05 cmp DWORD PTR lm$[rbp], 5
00082 72 59 jb SHORT $LN3@sn_compare
; 166 : unsigned la = FIELD_AVX10(left);
00084 b8 01 00 00 00 mov eax, 1
00089 48 6b c0 06 imul rax, rax, 6
0008d 0f b6 84 05 20
04 00 00 movzx eax, BYTE PTR left$[rbp+rax]
00095 89 45 44 mov DWORD PTR la$1[rbp], eax
; 167 : unsigned ra = FIELD_AVX10(right);
00098 b8 01 00 00 00 mov eax, 1
0009d 48 6b c0 06 imul rax, rax, 6
000a1 0f b6 84 05 28
04 00 00 movzx eax, BYTE PTR right$[rbp+rax]
000a9 89 45 64 mov DWORD PTR ra$2[rbp], eax
; 168 : if (la != ra)
000ac 8b 45 64 mov eax, DWORD PTR ra$2[rbp]
000af 39 45 44 cmp DWORD PTR la$1[rbp], eax
000b2 74 29 je SHORT $LN4@sn_compare
; 169 : return la > ra ? 1 : -1;
000b4 8b 45 64 mov eax, DWORD PTR ra$2[rbp]
000b7 39 45 44 cmp DWORD PTR la$1[rbp], eax
000ba 76 0c jbe SHORT $LN14@sn_compare
000bc c7 85 f4 03 00
00 01 00 00 00 mov DWORD PTR tv82[rbp], 1
000c6 eb 0a jmp SHORT $LN15@sn_compare
$LN14@sn_compare:
000c8 c7 85 f4 03 00
00 ff ff ff ff mov DWORD PTR tv82[rbp], -1
$LN15@sn_compare:
000d2 8b 85 f4 03 00
00 mov eax, DWORD PTR tv82[rbp]
000d8 e9 26 03 00 00 jmp $LN1@sn_compare
$LN4@sn_compare:
$LN3@sn_compare:
; 170 : }
; 171 :
; 172 : /* 3. AVX512 BASE (only when MainLevel >= AVX512) */
; 173 : if (lm >= SIMDID_MAIN_LVL_AVX512) {
000dd 83 7d 04 03 cmp DWORD PTR lm$[rbp], 3
000e1 0f 82 fe 01 00
00 jb $LN5@sn_compare
; 174 : uint16_t l512 = FIELD_AVX512(left);
000e7 b8 01 00 00 00 mov eax, 1
000ec 48 6b c0 02 imul rax, rax, 2
000f0 0f b6 84 05 20
04 00 00 movzx eax, BYTE PTR left$[rbp+rax]
000f8 b9 01 00 00 00 mov ecx, 1
000fd 48 6b c9 03 imul rcx, rcx, 3
00101 0f b6 8c 0d 20
04 00 00 movzx ecx, BYTE PTR left$[rbp+rcx]
00109 c1 e1 08 shl ecx, 8
0010c 0b c1 or eax, ecx
0010e 66 89 85 84 00
00 00 mov WORD PTR l512$3[rbp], ax
; 175 : uint16_t r512 = FIELD_AVX512(right);
00115 b8 01 00 00 00 mov eax, 1
0011a 48 6b c0 02 imul rax, rax, 2
0011e 0f b6 84 05 28
04 00 00 movzx eax, BYTE PTR right$[rbp+rax]
00126 b9 01 00 00 00 mov ecx, 1
0012b 48 6b c9 03 imul rcx, rcx, 3
0012f 0f b6 8c 0d 28
04 00 00 movzx ecx, BYTE PTR right$[rbp+rcx]
00137 c1 e1 08 shl ecx, 8
0013a 0b c1 or eax, ecx
0013c 66 89 85 a4 00
00 00 mov WORD PTR r512$4[rbp], ax
; 176 :
; 177 : int lb = (l512 & SIMDID_AVX512_BASE) != 0;
00143 0f b7 85 84 00
00 00 movzx eax, WORD PTR l512$3[rbp]
0014a 83 e0 10 and eax, 16
0014d 85 c0 test eax, eax
0014f 74 0c je SHORT $LN16@sn_compare
00151 c7 85 f4 03 00
00 01 00 00 00 mov DWORD PTR tv137[rbp], 1
0015b eb 0a jmp SHORT $LN17@sn_compare
$LN16@sn_compare:
0015d c7 85 f4 03 00
00 00 00 00 00 mov DWORD PTR tv137[rbp], 0
$LN17@sn_compare:
00167 8b 85 f4 03 00
00 mov eax, DWORD PTR tv137[rbp]
0016d 89 85 c4 00 00
00 mov DWORD PTR lb$5[rbp], eax
; 178 : int rb = (r512 & SIMDID_AVX512_BASE) != 0;
00173 0f b7 85 a4 00
00 00 movzx eax, WORD PTR r512$4[rbp]
0017a 83 e0 10 and eax, 16
0017d 85 c0 test eax, eax
0017f 74 0c je SHORT $LN18@sn_compare
00181 c7 85 f4 03 00
00 01 00 00 00 mov DWORD PTR tv141[rbp], 1
0018b eb 0a jmp SHORT $LN19@sn_compare
$LN18@sn_compare:
0018d c7 85 f4 03 00
00 00 00 00 00 mov DWORD PTR tv141[rbp], 0
$LN19@sn_compare:
00197 8b 85 f4 03 00
00 mov eax, DWORD PTR tv141[rbp]
0019d 89 85 e4 00 00
00 mov DWORD PTR rb$6[rbp], eax
; 179 : if (lb != rb)
001a3 8b 85 e4 00 00
00 mov eax, DWORD PTR rb$6[rbp]
001a9 39 85 c4 00 00
00 cmp DWORD PTR lb$5[rbp], eax
001af 74 2f je SHORT $LN6@sn_compare
; 180 : return lb > rb ? 1 : -1;
001b1 8b 85 e4 00 00
00 mov eax, DWORD PTR rb$6[rbp]
001b7 39 85 c4 00 00
00 cmp DWORD PTR lb$5[rbp], eax
001bd 7e 0c jle SHORT $LN20@sn_compare
001bf c7 85 f4 03 00
00 01 00 00 00 mov DWORD PTR tv144[rbp], 1
001c9 eb 0a jmp SHORT $LN21@sn_compare
$LN20@sn_compare:
001cb c7 85 f4 03 00
00 ff ff ff ff mov DWORD PTR tv144[rbp], -1
$LN21@sn_compare:
001d5 8b 85 f4 03 00
00 mov eax, DWORD PTR tv144[rbp]
001db e9 23 02 00 00 jmp $LN1@sn_compare
$LN6@sn_compare:
; 181 :
; 182 : // 4. Extension popcount (mask out BASE + IMPL + reserved low nibble)
; 183 : int drop = ~(SIMDID_AVX512_BASE | SIMDID_AVX512_IMPL_MASK | 0x000Fu);
001e0 c7 85 04 01 00
00 20 ff ff ff mov DWORD PTR drop$7[rbp], -224 ; ffffffffffffff20H
; 184 : uint16_t ext_mask = drop & (l512 | r512); /* only consider bits set in either */
001ea 0f b7 85 84 00
00 00 movzx eax, WORD PTR l512$3[rbp]
001f1 0f b7 8d a4 00
00 00 movzx ecx, WORD PTR r512$4[rbp]
001f8 0b c1 or eax, ecx
001fa 8b 8d 04 01 00
00 mov ecx, DWORD PTR drop$7[rbp]
00200 23 c8 and ecx, eax
00202 8b c1 mov eax, ecx
00204 66 89 85 24 01
00 00 mov WORD PTR ext_mask$8[rbp], ax
; 185 : int lp = popcount16(l512 & ext_mask);
0020b 0f b7 85 84 00
00 00 movzx eax, WORD PTR l512$3[rbp]
00212 0f b7 8d 24 01
00 00 movzx ecx, WORD PTR ext_mask$8[rbp]
00219 23 c1 and eax, ecx
0021b 0f b7 c8 movzx ecx, ax
0021e e8 00 00 00 00 call popcount16
00223 89 85 44 01 00
00 mov DWORD PTR lp$9[rbp], eax
; 186 : int rp = popcount16(r512 & ext_mask);
00229 0f b7 85 a4 00
00 00 movzx eax, WORD PTR r512$4[rbp]
00230 0f b7 8d 24 01
00 00 movzx ecx, WORD PTR ext_mask$8[rbp]
00237 23 c1 and eax, ecx
00239 0f b7 c8 movzx ecx, ax
0023c e8 00 00 00 00 call popcount16
00241 89 85 64 01 00
00 mov DWORD PTR rp$10[rbp], eax
; 187 : if (lp != rp)
00247 8b 85 64 01 00
00 mov eax, DWORD PTR rp$10[rbp]
0024d 39 85 44 01 00
00 cmp DWORD PTR lp$9[rbp], eax
00253 74 2f je SHORT $LN7@sn_compare
; 188 : return lp > rp ? 1 : -1;
00255 8b 85 64 01 00
00 mov eax, DWORD PTR rp$10[rbp]
0025b 39 85 44 01 00
00 cmp DWORD PTR lp$9[rbp], eax
00261 7e 0c jle SHORT $LN22@sn_compare
00263 c7 85 f4 03 00
00 01 00 00 00 mov DWORD PTR tv164[rbp], 1
0026d eb 0a jmp SHORT $LN23@sn_compare
$LN22@sn_compare:
0026f c7 85 f4 03 00
00 ff ff ff ff mov DWORD PTR tv164[rbp], -1
$LN23@sn_compare:
00279 8b 85 f4 03 00
00 mov eax, DWORD PTR tv164[rbp]
0027f e9 7f 01 00 00 jmp $LN1@sn_compare
$LN7@sn_compare:
; 189 :
; 190 : /* 5. IMPL strength */
; 191 : int ls = impl_strength(l512);
00284 0f b7 8d 84 00
00 00 movzx ecx, WORD PTR l512$3[rbp]
0028b e8 00 00 00 00 call impl_strength
00290 89 85 84 01 00
00 mov DWORD PTR ls$11[rbp], eax
; 192 : int rs = impl_strength(r512);
00296 0f b7 8d a4 00
00 00 movzx ecx, WORD PTR r512$4[rbp]
0029d e8 00 00 00 00 call impl_strength
002a2 89 85 a4 01 00
00 mov DWORD PTR rs$12[rbp], eax
; 193 : if (ls != rs)
002a8 8b 85 a4 01 00
00 mov eax, DWORD PTR rs$12[rbp]
002ae 39 85 84 01 00
00 cmp DWORD PTR ls$11[rbp], eax
002b4 74 2f je SHORT $LN8@sn_compare
; 194 : return ls > rs ? 1 : -1;
002b6 8b 85 a4 01 00
00 mov eax, DWORD PTR rs$12[rbp]
002bc 39 85 84 01 00
00 cmp DWORD PTR ls$11[rbp], eax
002c2 7e 0c jle SHORT $LN24@sn_compare
002c4 c7 85 f4 03 00
00 01 00 00 00 mov DWORD PTR tv171[rbp], 1
002ce eb 0a jmp SHORT $LN25@sn_compare
$LN24@sn_compare:
002d0 c7 85 f4 03 00
00 ff ff ff ff mov DWORD PTR tv171[rbp], -1
$LN25@sn_compare:
002da 8b 85 f4 03 00
00 mov eax, DWORD PTR tv171[rbp]
002e0 e9 1e 01 00 00 jmp $LN1@sn_compare
$LN8@sn_compare:
$LN5@sn_compare:
; 195 : }
; 196 :
; 197 : /* 6. uArchHi topology bits [1..0]: unified(3) > P(2) > E(1) > unknown(0) */
; 198 : unsigned lu = FIELD_UARCH(left);
002e5 b8 01 00 00 00 mov eax, 1
002ea 48 6b c0 07 imul rax, rax, 7
002ee 0f b6 84 05 20
04 00 00 movzx eax, BYTE PTR left$[rbp+rax]
002f6 89 85 c4 01 00
00 mov DWORD PTR lu$[rbp], eax
; 199 : unsigned ru = FIELD_UARCH(right);
002fc b8 01 00 00 00 mov eax, 1
00301 48 6b c0 07 imul rax, rax, 7
00305 0f b6 84 05 28
04 00 00 movzx eax, BYTE PTR right$[rbp+rax]
0030d 89 85 e4 01 00
00 mov DWORD PTR ru$[rbp], eax
; 200 : unsigned lt = lu & 0x3u;
00313 8b 85 c4 01 00
00 mov eax, DWORD PTR lu$[rbp]
00319 83 e0 03 and eax, 3
0031c 89 85 04 02 00
00 mov DWORD PTR lt$[rbp], eax
; 201 : unsigned rt = ru & 0x3u;
00322 8b 85 e4 01 00
00 mov eax, DWORD PTR ru$[rbp]
00328 83 e0 03 and eax, 3
0032b 89 85 24 02 00
00 mov DWORD PTR rt$[rbp], eax
; 202 : if (lt != rt)
00331 8b 85 24 02 00
00 mov eax, DWORD PTR rt$[rbp]
00337 39 85 04 02 00
00 cmp DWORD PTR lt$[rbp], eax
0033d 74 2f je SHORT $LN9@sn_compare
; 203 : return lt > rt ? 1 : -1;
0033f 8b 85 24 02 00
00 mov eax, DWORD PTR rt$[rbp]
00345 39 85 04 02 00
00 cmp DWORD PTR lt$[rbp], eax
0034b 76 0c jbe SHORT $LN26@sn_compare
0034d c7 85 f4 03 00
00 01 00 00 00 mov DWORD PTR tv182[rbp], 1
00357 eb 0a jmp SHORT $LN27@sn_compare
$LN26@sn_compare:
00359 c7 85 f4 03 00
00 ff ff ff ff mov DWORD PTR tv182[rbp], -1
$LN27@sn_compare:
00363 8b 85 f4 03 00
00 mov eax, DWORD PTR tv182[rbp]
00369 e9 95 00 00 00 jmp $LN1@sn_compare
$LN9@sn_compare:
; 204 :
; 205 : /* 7. uArchHi SIMD_DUAL: non-dual (SIMD_DUAL=0) > dual (SIMD_DUAL=1) */
; 206 : int ld = (lu & SIMDID_UARCH_SIMD_DUAL) != 0;
0036e 8b 85 c4 01 00
00 mov eax, DWORD PTR lu$[rbp]
00374 83 e0 04 and eax, 4
00377 85 c0 test eax, eax
00379 74 0c je SHORT $LN28@sn_compare
0037b c7 85 f4 03 00
00 01 00 00 00 mov DWORD PTR tv185[rbp], 1
00385 eb 0a jmp SHORT $LN29@sn_compare
$LN28@sn_compare:
00387 c7 85 f4 03 00
00 00 00 00 00 mov DWORD PTR tv185[rbp], 0
$LN29@sn_compare:
00391 8b 85 f4 03 00
00 mov eax, DWORD PTR tv185[rbp]
00397 89 85 44 02 00
00 mov DWORD PTR ld$[rbp], eax
; 207 : int rd = (ru & SIMDID_UARCH_SIMD_DUAL) != 0;
0039d 8b 85 e4 01 00
00 mov eax, DWORD PTR ru$[rbp]
003a3 83 e0 04 and eax, 4
003a6 85 c0 test eax, eax
003a8 74 0c je SHORT $LN30@sn_compare
003aa c7 85 f4 03 00
00 01 00 00 00 mov DWORD PTR tv188[rbp], 1
003b4 eb 0a jmp SHORT $LN31@sn_compare
$LN30@sn_compare:
003b6 c7 85 f4 03 00
00 00 00 00 00 mov DWORD PTR tv188[rbp], 0
$LN31@sn_compare:
003c0 8b 85 f4 03 00
00 mov eax, DWORD PTR tv188[rbp]
003c6 89 85 64 02 00
00 mov DWORD PTR rd$[rbp], eax
; 208 : if (ld != rd)
003cc 8b 85 64 02 00
00 mov eax, DWORD PTR rd$[rbp]
003d2 39 85 44 02 00
00 cmp DWORD PTR ld$[rbp], eax
003d8 74 27 je SHORT $LN10@sn_compare
; 209 : return ld ? -1 : 1; /* non-dual is stronger */
003da 83 bd 44 02 00
00 00 cmp DWORD PTR ld$[rbp], 0
003e1 74 0c je SHORT $LN32@sn_compare
003e3 c7 85 f4 03 00
00 ff ff ff ff mov DWORD PTR tv191[rbp], -1
003ed eb 0a jmp SHORT $LN33@sn_compare
$LN32@sn_compare:
003ef c7 85 f4 03 00
00 01 00 00 00 mov DWORD PTR tv191[rbp], 1
$LN33@sn_compare:
003f9 8b 85 f4 03 00
00 mov eax, DWORD PTR tv191[rbp]
003ff eb 02 jmp SHORT $LN1@sn_compare
$LN10@sn_compare:
; 210 :
; 211 : return 0;
00401 33 c0 xor eax, eax
$LN1@sn_compare:
; 212 : }
00403 48 8d a5 08 04
00 00 lea rsp, QWORD PTR [rbp+1032]
0040a 5f pop rdi
0040b 5d pop rbp
0040c c3 ret 0
sn_compare_simd ENDP
_TEXT ENDS
; Function compile flags: /Odtp /RTCsu /ZI
; File D:\platform-dev\StgSharp.Native\sn-src\simdid_compare.x86.c
; COMDAT sn_get_unite_simd
_TEXT SEGMENT
out$ = 8
lb0$ = 36
rb0$ = 68
lm$ = 100
rm$ = 132
l512$ = 164
r512$ = 196
merged$ = 228
ls$ = 260
rs$ = 292
s$ = 324
weak_impl$ = 356
lu$ = 388
ru$ = 420
topo$ = 452
dual$ = 484
tv74 = 692
tv87 = 692
tv150 = 692
left$ = 736
right$ = 744
sn_get_unite_simd PROC ; COMDAT
; 67 : {
$LN9:
00000 48 89 54 24 10 mov QWORD PTR [rsp+16], rdx
00005 48 89 4c 24 08 mov QWORD PTR [rsp+8], rcx
0000a 55 push rbp
0000b 57 push rdi
0000c 48 81 ec e8 02
00 00 sub rsp, 744 ; 000002e8H
00013 48 8d 6c 24 20 lea rbp, QWORD PTR [rsp+32]
00018 48 8d 7c 24 20 lea rdi, QWORD PTR [rsp+32]
0001d b9 82 00 00 00 mov ecx, 130 ; 00000082H
00022 b8 cc cc cc cc mov eax, -858993460 ; ccccccccH
00027 f3 ab rep stosd
00029 48 8b 8c 24 08
03 00 00 mov rcx, QWORD PTR [rsp+776]
00031 48 8d 0d 00 00
00 00 lea rcx, OFFSET FLAT:__36E6045D_simdid_compare@x86@c
00038 e8 00 00 00 00 call __CheckForDebuggerJustMyCode
0003d 90 npad 1
; 68 : SIMDID out;
; 69 : out.mask = 0;
0003e 48 c7 45 08 00
00 00 00 mov QWORD PTR out$[rbp], 0
; 70 :
; 71 : /* Root + Manufacture (byte 0): prefer left (same arch assumed) */
; 72 : unsigned char lb0 = (unsigned char)left.make_byte[0];
00046 b8 01 00 00 00 mov eax, 1
0004b 48 6b c0 00 imul rax, rax, 0
0004f 0f b6 84 05 e0
02 00 00 movzx eax, BYTE PTR left$[rbp+rax]
00057 88 45 24 mov BYTE PTR lb0$[rbp], al
; 73 : unsigned char rb0 = (unsigned char)right.make_byte[0];
0005a b8 01 00 00 00 mov eax, 1
0005f 48 6b c0 00 imul rax, rax, 0
00063 0f b6 84 05 e8
02 00 00 movzx eax, BYTE PTR right$[rbp+rax]
0006b 88 45 44 mov BYTE PTR rb0$[rbp], al
; 74 : out.make_byte[0] = (char)(lb0 ? lb0 : rb0);
0006e 0f b6 45 24 movzx eax, BYTE PTR lb0$[rbp]
00072 85 c0 test eax, eax
00074 74 0c je SHORT $LN3@sn_get_uni
00076 0f b6 45 24 movzx eax, BYTE PTR lb0$[rbp]
0007a 89 85 b4 02 00
00 mov DWORD PTR tv74[rbp], eax
00080 eb 0a jmp SHORT $LN4@sn_get_uni
$LN3@sn_get_uni:
00082 0f b6 45 44 movzx eax, BYTE PTR rb0$[rbp]
00086 89 85 b4 02 00
00 mov DWORD PTR tv74[rbp], eax
$LN4@sn_get_uni:
0008c b8 01 00 00 00 mov eax, 1
00091 48 6b c0 00 imul rax, rax, 0
00095 0f b6 8d b4 02
00 00 movzx ecx, BYTE PTR tv74[rbp]
0009c 88 4c 05 08 mov BYTE PTR out$[rbp+rax], cl
; 75 :
; 76 : /* MainLevel (byte 1): min */
; 77 : unsigned char lm = FIELD_MAIN(left);
000a0 b8 01 00 00 00 mov eax, 1
000a5 48 6b c0 01 imul rax, rax, 1
000a9 0f b6 84 05 e0
02 00 00 movzx eax, BYTE PTR left$[rbp+rax]
000b1 88 45 64 mov BYTE PTR lm$[rbp], al
; 78 : unsigned char rm = FIELD_MAIN(right);
000b4 b8 01 00 00 00 mov eax, 1
000b9 48 6b c0 01 imul rax, rax, 1
000bd 0f b6 84 05 e8
02 00 00 movzx eax, BYTE PTR right$[rbp+rax]
000c5 88 85 84 00 00
00 mov BYTE PTR rm$[rbp], al
; 79 : out.make_byte[1] = (char)(lm < rm ? lm : rm);
000cb 0f b6 45 64 movzx eax, BYTE PTR lm$[rbp]
000cf 0f b6 8d 84 00
00 00 movzx ecx, BYTE PTR rm$[rbp]
000d6 3b c1 cmp eax, ecx
000d8 7d 0c jge SHORT $LN5@sn_get_uni
000da 0f b6 45 64 movzx eax, BYTE PTR lm$[rbp]
000de 89 85 b4 02 00
00 mov DWORD PTR tv87[rbp], eax
000e4 eb 0d jmp SHORT $LN6@sn_get_uni
$LN5@sn_get_uni:
000e6 0f b6 85 84 00
00 00 movzx eax, BYTE PTR rm$[rbp]
000ed 89 85 b4 02 00
00 mov DWORD PTR tv87[rbp], eax
$LN6@sn_get_uni:
000f3 b8 01 00 00 00 mov eax, 1
000f8 48 6b c0 01 imul rax, rax, 1
000fc 0f b6 8d b4 02
00 00 movzx ecx, BYTE PTR tv87[rbp]
00103 88 4c 05 08 mov BYTE PTR out$[rbp+rax], cl
; 80 :
; 81 : /* AVX512 features (bytes 2-3): AND all bits, then fix IMPL to weaker */
; 82 : uint16_t l512 = FIELD_AVX512(left);
00107 b8 01 00 00 00 mov eax, 1
0010c 48 6b c0 02 imul rax, rax, 2
00110 0f b6 84 05 e0
02 00 00 movzx eax, BYTE PTR left$[rbp+rax]
00118 b9 01 00 00 00 mov ecx, 1
0011d 48 6b c9 03 imul rcx, rcx, 3
00121 0f b6 8c 0d e0
02 00 00 movzx ecx, BYTE PTR left$[rbp+rcx]
00129 c1 e1 08 shl ecx, 8
0012c 0b c1 or eax, ecx
0012e 66 89 85 a4 00
00 00 mov WORD PTR l512$[rbp], ax
; 83 : uint16_t r512 = FIELD_AVX512(right);
00135 b8 01 00 00 00 mov eax, 1
0013a 48 6b c0 02 imul rax, rax, 2
0013e 0f b6 84 05 e8
02 00 00 movzx eax, BYTE PTR right$[rbp+rax]
00146 b9 01 00 00 00 mov ecx, 1
0014b 48 6b c9 03 imul rcx, rcx, 3
0014f 0f b6 8c 0d e8
02 00 00 movzx ecx, BYTE PTR right$[rbp+rcx]
00157 c1 e1 08 shl ecx, 8
0015a 0b c1 or eax, ecx
0015c 66 89 85 c4 00
00 00 mov WORD PTR r512$[rbp], ax
; 84 : uint16_t merged = l512 & r512;
00163 0f b7 85 a4 00
00 00 movzx eax, WORD PTR l512$[rbp]
0016a 0f b7 8d c4 00
00 00 movzx ecx, WORD PTR r512$[rbp]
00171 23 c1 and eax, ecx
00173 66 89 85 e4 00
00 00 mov WORD PTR merged$[rbp], ax
; 85 :
; 86 : /* Clear the IMPL field, then set the weaker one */
; 87 : int ls = impl_strength(l512);
0017a 0f b7 8d a4 00
00 00 movzx ecx, WORD PTR l512$[rbp]
00181 e8 00 00 00 00 call impl_strength
00186 89 85 04 01 00
00 mov DWORD PTR ls$[rbp], eax
; 88 : int rs = impl_strength(r512);
0018c 0f b7 8d c4 00
00 00 movzx ecx, WORD PTR r512$[rbp]
00193 e8 00 00 00 00 call impl_strength
00198 89 85 24 01 00
00 mov DWORD PTR rs$[rbp], eax
; 89 : int s = (ls <= rs) ? l512 : r512; /* pick the one with weaker strength ordinal */
0019e 8b 85 24 01 00
00 mov eax, DWORD PTR rs$[rbp]
001a4 39 85 04 01 00
00 cmp DWORD PTR ls$[rbp], eax
001aa 7f 0f jg SHORT $LN7@sn_get_uni
001ac 0f b7 85 a4 00
00 00 movzx eax, WORD PTR l512$[rbp]
001b3 89 85 b4 02 00
00 mov DWORD PTR tv150[rbp], eax
001b9 eb 0d jmp SHORT $LN8@sn_get_uni
$LN7@sn_get_uni:
001bb 0f b7 85 c4 00
00 00 movzx eax, WORD PTR r512$[rbp]
001c2 89 85 b4 02 00
00 mov DWORD PTR tv150[rbp], eax
$LN8@sn_get_uni:
001c8 8b 85 b4 02 00
00 mov eax, DWORD PTR tv150[rbp]
001ce 89 85 44 01 00
00 mov DWORD PTR s$[rbp], eax
; 90 : unsigned weak_impl = (s >> SIMDID_AVX512_IMPL_SHIFT) & 0x3u;
001d4 8b 85 44 01 00
00 mov eax, DWORD PTR s$[rbp]
001da c1 f8 06 sar eax, 6
001dd 83 e0 03 and eax, 3
001e0 89 85 64 01 00
00 mov DWORD PTR weak_impl$[rbp], eax
; 91 : merged &= ~(uint16_t)SIMDID_AVX512_IMPL_MASK;
001e6 0f b7 85 e4 00
00 00 movzx eax, WORD PTR merged$[rbp]
001ed 25 3f ff ff ff and eax, -193 ; ffffffffffffff3fH
001f2 66 89 85 e4 00
00 00 mov WORD PTR merged$[rbp], ax
; 92 : merged |= (uint16_t)(weak_impl << SIMDID_AVX512_IMPL_SHIFT);
001f9 8b 85 64 01 00
00 mov eax, DWORD PTR weak_impl$[rbp]
001ff c1 e0 06 shl eax, 6
00202 0f b7 c0 movzx eax, ax
00205 0f b7 8d e4 00
00 00 movzx ecx, WORD PTR merged$[rbp]
0020c 0b c8 or ecx, eax
0020e 8b c1 mov eax, ecx
00210 66 89 85 e4 00
00 00 mov WORD PTR merged$[rbp], ax
; 93 : out.make_byte[2] = (char)(merged & 0xFF);
00217 0f b7 85 e4 00
00 00 movzx eax, WORD PTR merged$[rbp]
0021e 25 ff 00 00 00 and eax, 255 ; 000000ffH
00223 b9 01 00 00 00 mov ecx, 1
00228 48 6b c9 02 imul rcx, rcx, 2
0022c 88 44 0d 08 mov BYTE PTR out$[rbp+rcx], al
; 94 : out.make_byte[3] = (char)((merged >> 8) & 0xFF);
00230 0f b7 85 e4 00
00 00 movzx eax, WORD PTR merged$[rbp]
00237 c1 f8 08 sar eax, 8
0023a 25 ff 00 00 00 and eax, 255 ; 000000ffH
0023f b9 01 00 00 00 mov ecx, 1
00244 48 6b c9 03 imul rcx, rcx, 3
00248 88 44 0d 08 mov BYTE PTR out$[rbp+rcx], al
; 95 :
; 96 : /* AMX (byte 4): AND */
; 97 : out.make_byte[4] = left.make_byte[4] & right.make_byte[4];
0024c b8 01 00 00 00 mov eax, 1
00251 48 6b c0 04 imul rax, rax, 4
00255 0f be 84 05 e0
02 00 00 movsx eax, BYTE PTR left$[rbp+rax]
0025d b9 01 00 00 00 mov ecx, 1
00262 48 6b c9 04 imul rcx, rcx, 4
00266 0f be 8c 0d e8
02 00 00 movsx ecx, BYTE PTR right$[rbp+rcx]
0026e 23 c1 and eax, ecx
00270 b9 01 00 00 00 mov ecx, 1
00275 48 6b c9 04 imul rcx, rcx, 4
00279 88 44 0d 08 mov BYTE PTR out$[rbp+rcx], al
; 98 :
; 99 : /* AVX (byte 5): AND */
; 100 : out.make_byte[5] = left.make_byte[5] & right.make_byte[5];
0027d b8 01 00 00 00 mov eax, 1
00282 48 6b c0 05 imul rax, rax, 5
00286 0f be 84 05 e0
02 00 00 movsx eax, BYTE PTR left$[rbp+rax]
0028e b9 01 00 00 00 mov ecx, 1
00293 48 6b c9 05 imul rcx, rcx, 5
00297 0f be 8c 0d e8
02 00 00 movsx ecx, BYTE PTR right$[rbp+rcx]
0029f 23 c1 and eax, ecx
002a1 b9 01 00 00 00 mov ecx, 1
002a6 48 6b c9 05 imul rcx, rcx, 5
002aa 88 44 0d 08 mov BYTE PTR out$[rbp+rcx], al
; 101 :
; 102 : /* AVX10 (byte 6): AND */
; 103 : out.make_byte[6] = left.make_byte[6] & right.make_byte[6];
002ae b8 01 00 00 00 mov eax, 1
002b3 48 6b c0 06 imul rax, rax, 6
002b7 0f be 84 05 e0
02 00 00 movsx eax, BYTE PTR left$[rbp+rax]
002bf b9 01 00 00 00 mov ecx, 1
002c4 48 6b c9 06 imul rcx, rcx, 6
002c8 0f be 8c 0d e8
02 00 00 movsx ecx, BYTE PTR right$[rbp+rcx]
002d0 23 c1 and eax, ecx
002d2 b9 01 00 00 00 mov ecx, 1
002d7 48 6b c9 06 imul rcx, rcx, 6
002db 88 44 0d 08 mov BYTE PTR out$[rbp+rcx], al
; 104 :
; 105 : /* uArchHi (byte 7):
; 106 : * topology bits [1..0]: AND — conservative intersection (weaker topology wins)
; 107 : * SIMD_DUAL bit [2]: OR — dual if either core is dual */
; 108 : unsigned char lu = FIELD_UARCH(left);
002df b8 01 00 00 00 mov eax, 1
002e4 48 6b c0 07 imul rax, rax, 7
002e8 0f b6 84 05 e0
02 00 00 movzx eax, BYTE PTR left$[rbp+rax]
002f0 88 85 84 01 00
00 mov BYTE PTR lu$[rbp], al
; 109 : unsigned char ru = FIELD_UARCH(right);
002f6 b8 01 00 00 00 mov eax, 1
002fb 48 6b c0 07 imul rax, rax, 7
002ff 0f b6 84 05 e8
02 00 00 movzx eax, BYTE PTR right$[rbp+rax]
00307 88 85 a4 01 00
00 mov BYTE PTR ru$[rbp], al
; 110 : unsigned char topo = (lu & 0x3u) & (ru & 0x3u);
0030d 0f b6 85 84 01
00 00 movzx eax, BYTE PTR lu$[rbp]
00314 83 e0 03 and eax, 3
00317 0f b6 8d a4 01
00 00 movzx ecx, BYTE PTR ru$[rbp]
0031e 83 e1 03 and ecx, 3
00321 23 c1 and eax, ecx
00323 88 85 c4 01 00
00 mov BYTE PTR topo$[rbp], al
; 111 : unsigned char dual = (lu | ru) & (unsigned char)SIMDID_UARCH_SIMD_DUAL;
00329 0f b6 85 84 01
00 00 movzx eax, BYTE PTR lu$[rbp]
00330 0f b6 8d a4 01
00 00 movzx ecx, BYTE PTR ru$[rbp]
00337 0b c1 or eax, ecx
00339 83 e0 04 and eax, 4
0033c 88 85 e4 01 00
00 mov BYTE PTR dual$[rbp], al
; 112 : out.make_byte[7] = (char)(topo | dual);
00342 0f b6 85 c4 01
00 00 movzx eax, BYTE PTR topo$[rbp]
00349 0f b6 8d e4 01
00 00 movzx ecx, BYTE PTR dual$[rbp]
00350 0b c1 or eax, ecx
00352 b9 01 00 00 00 mov ecx, 1
00357 48 6b c9 07 imul rcx, rcx, 7
0035b 88 44 0d 08 mov BYTE PTR out$[rbp+rcx], al
; 113 :
; 114 : return out;
0035f 48 8b 45 08 mov rax, QWORD PTR out$[rbp]
; 115 : }
00363 48 8b f8 mov rdi, rax
00366 48 8d 4d e0 lea rcx, QWORD PTR [rbp-32]
0036a 48 8d 15 00 00
00 00 lea rdx, OFFSET FLAT:sn_get_unite_simd$rtcFrameData
00371 e8 00 00 00 00 call _RTC_CheckStackVars
00376 48 8b c7 mov rax, rdi
00379 48 8d a5 c8 02
00 00 lea rsp, QWORD PTR [rbp+712]
00380 5f pop rdi
00381 5d pop rbp
00382 c3 ret 0
sn_get_unite_simd ENDP
_TEXT ENDS
END