; Listing generated by Microsoft (R) Optimizing Compiler Version 19.44.35220.0 include listing.inc INCLUDELIB MSVCRTD INCLUDELIB OLDNAMES _DATA SEGMENT COMM infolog:BYTE:0200H _DATA ENDS msvcjmc SEGMENT __5C8CA4D3_mmintrin@h DB 01H __8C83BECC_concurrencysal@h DB 01H __608E3340_sal@h DB 01H __FB67E29A_vadefs@h DB 01H __1D1B619C_vcruntime@h DB 01H __735960E1_corecrt@h DB 01H __211DB995_corecrt_malloc@h DB 01H __7CD62D9E_malloc@h DB 01H __9DCE0DC8_xmmintrin@h DB 01H __4C2AD0C7_winpackagefamily@h DB 01H __9DED9ED1_winapifamily@h DB 01H __12FEDF4E_sdkddkver@h DB 01H __9BAEE128_excpt@h DB 01H __B7B53233_stdarg@h DB 01H __6B04FCB3_specstrings_undef@h DB 01H __F4027AF7_specstrings_strict@h DB 01H __B90340D4_sdv_driverspecs@h DB 01H __BFFF5AD3_driverspecs@h DB 01H __32847078_specstrings@h DB 01H __108B2620_corecrt_wctype@h DB 01H __6CD6613D_ctype@h DB 01H __30902A1F_kernelspecs@h DB 01H __376FD5CA_basetsd@h DB 01H __13DE2371_errno@h DB 01H __8C6AE390_vcruntime_string@h DB 01H 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__A3FD3A34_winver@h DB 01H __6F8AD9F1_reason@h DB 01H __4C90FD6F_winreg@h DB 01H __68AFEBAD_wnnc@h DB 01H __5A7AB086_winnetwk@h DB 01H __2FE8A10C_stralign@h DB 01H __34558472_winsvc@h DB 01H __058845F1_mcx@h DB 01H __7F16006B_ime_cmodes@h DB 01H __0A3AF599_imm@h DB 01H __9349FE86_windows@h DB 01H __639A050C_sn_internal@h DB 01H __836A8CFC_stdint@h DB 01H __714FE6D7_sn_target@h DB 01H __60B45B40_corecrt_stdio_config@h DB 01H __CFA3741E_corecrt_wstdio@h DB 01H __B3FE3303_stdio@h DB 01H __955456CD_stddef@h DB 01H __99AED4FB_corecrt_search@h DB 01H __8B813BF6_corecrt_wstdlib@h DB 01H __3D1CA2C3_limits@h DB 01H __E8FB0A68_stdlib@h DB 01H __F562FA57_stb_image@h DB 01H __C95DC661_khrplatform@h DB 01H __6C577136_gl@h DB 01H __EE638A2C_wgl@h DB 01H __8EF9E35C_glfw3@h DB 01H __F8AC8404_emmintrin@h DB 01H __270DEC8D_pmmintrin@h DB 01H __97D49F0F_tmmintrin@h DB 01H __BEEF8A8C_smmintrin@h DB 01H __DB8D0340_nmmintrin@h DB 01H __0E36F90E_wmmintrin@h DB 01H __C5A2B409_zmmintrin@h DB 01H __F2B616C3_immintrin@h DB 01H __9FB25DBE_assert@h DB 01H __4E664295_glfw_function@h DB 01H __64C0EF11_StgSharpNative@h DB 01H __E2EC0CAF_sn_matkernel@h DB 01H __47E843D2_intrin0@inl@h DB 01H __130964FF_setjmp@h DB 01H __4875F786_ammintrin@h DB 01H __353FD888_intrin@h DB 01H __5FE1E9E3_isa_availability@h DB 01H __AA840D82_sn_intrinsic@h DB 01H __CE29950A_sn_intrincontext@x86@h DB 01H __BAFF6ACF_m@bufop@x86@c DB 01H msvcjmc ENDS PUBLIC float_buf_add_sse PUBLIC float_buf_add_avx PUBLIC float_buf_add_512 PUBLIC double_buf_add_sse PUBLIC double_buf_add_avx PUBLIC double_buf_add_512 PUBLIC float_buf_sub_sse PUBLIC float_buf_sub_avx PUBLIC float_buf_sub_512 PUBLIC double_buf_sub_sse PUBLIC double_buf_sub_avx PUBLIC double_buf_sub_512 PUBLIC float_buf_scalar_mul_sse PUBLIC float_buf_scalar_mul_avx PUBLIC float_buf_scalar_mul_512 PUBLIC double_buf_scalar_mul_sse PUBLIC double_buf_scalar_mul_avx PUBLIC double_buf_scalar_mul_512 PUBLIC float_buf_fill_sse PUBLIC float_buf_fill_avx PUBLIC float_buf_fill_512 PUBLIC double_buf_fill_sse PUBLIC double_buf_fill_avx PUBLIC double_buf_fill_512 PUBLIC __JustMyCode_Default EXTRN _RTC_InitBase:PROC EXTRN _RTC_Shutdown:PROC EXTRN __CheckForDebuggerJustMyCode:PROC EXTRN _fltused:DWORD ; COMDAT pdata pdata SEGMENT $pdata$float_buf_add_sse DD imagerel $LN6 DD imagerel $LN6+524 DD imagerel $unwind$float_buf_add_sse pdata ENDS ; COMDAT pdata pdata SEGMENT $pdata$float_buf_add_avx DD imagerel $LN6 DD imagerel $LN6+343 DD imagerel $unwind$float_buf_add_avx pdata ENDS ; COMDAT pdata pdata SEGMENT $pdata$float_buf_add_512 DD imagerel $LN6 DD imagerel $LN6+226 DD imagerel $unwind$float_buf_add_512 pdata ENDS ; COMDAT pdata pdata SEGMENT $pdata$double_buf_add_sse DD imagerel $LN6 DD imagerel $LN6+1072 DD imagerel $unwind$double_buf_add_sse pdata ENDS ; COMDAT pdata pdata SEGMENT $pdata$double_buf_add_avx DD imagerel $LN6 DD imagerel $LN6+607 DD imagerel $unwind$double_buf_add_avx pdata ENDS ; COMDAT pdata pdata SEGMENT $pdata$double_buf_add_512 DD imagerel $LN6 DD imagerel $LN6+365 DD imagerel $unwind$double_buf_add_512 pdata ENDS ; COMDAT pdata pdata SEGMENT $pdata$float_buf_sub_sse DD imagerel $LN6 DD imagerel $LN6+524 DD imagerel $unwind$float_buf_sub_sse pdata ENDS ; COMDAT pdata pdata SEGMENT $pdata$float_buf_sub_avx DD imagerel $LN6 DD imagerel $LN6+335 DD imagerel $unwind$float_buf_sub_avx pdata ENDS ; COMDAT pdata pdata SEGMENT $pdata$float_buf_sub_512 DD imagerel $LN6 DD imagerel $LN6+226 DD imagerel $unwind$float_buf_sub_512 pdata ENDS ; COMDAT pdata pdata SEGMENT $pdata$double_buf_sub_sse DD imagerel $LN6 DD imagerel $LN6+1040 DD imagerel $unwind$double_buf_sub_sse pdata ENDS ; COMDAT pdata pdata SEGMENT $pdata$double_buf_sub_avx DD imagerel $LN6 DD imagerel $LN6+353 DD imagerel $unwind$double_buf_sub_avx pdata ENDS ; COMDAT pdata pdata SEGMENT $pdata$double_buf_sub_512 DD imagerel $LN6 DD imagerel $LN6+239 DD imagerel $unwind$double_buf_sub_512 pdata ENDS ; COMDAT pdata pdata SEGMENT $pdata$float_buf_scalar_mul_sse DD imagerel $LN6 DD imagerel $LN6+443 DD imagerel $unwind$float_buf_scalar_mul_sse pdata ENDS ; COMDAT pdata pdata SEGMENT $pdata$float_buf_scalar_mul_avx DD imagerel $LN6 DD imagerel $LN6+300 DD imagerel $unwind$float_buf_scalar_mul_avx pdata ENDS ; COMDAT pdata pdata SEGMENT $pdata$float_buf_scalar_mul_512 DD imagerel $LN6 DD imagerel $LN6+246 DD imagerel $unwind$float_buf_scalar_mul_512 pdata ENDS ; COMDAT pdata pdata SEGMENT $pdata$double_buf_scalar_mul_sse DD imagerel $LN6 DD imagerel $LN6+819 DD imagerel $unwind$double_buf_scalar_mul_sse pdata ENDS ; COMDAT pdata pdata SEGMENT $pdata$double_buf_scalar_mul_avx DD imagerel $LN6 DD imagerel $LN6+494 DD imagerel $unwind$double_buf_scalar_mul_avx pdata ENDS ; COMDAT pdata pdata SEGMENT $pdata$double_buf_scalar_mul_512 DD imagerel $LN6 DD imagerel $LN6+350 DD imagerel $unwind$double_buf_scalar_mul_512 pdata ENDS ; COMDAT pdata pdata SEGMENT $pdata$float_buf_fill_sse DD imagerel $LN6 DD imagerel $LN6+264 DD imagerel $unwind$float_buf_fill_sse pdata ENDS ; COMDAT pdata pdata SEGMENT $pdata$float_buf_fill_avx DD imagerel $LN6 DD imagerel $LN6+192 DD imagerel $unwind$float_buf_fill_avx pdata ENDS ; COMDAT pdata pdata SEGMENT $pdata$float_buf_fill_512 DD imagerel $LN6 DD imagerel $LN6+187 DD imagerel $unwind$float_buf_fill_512 pdata ENDS ; COMDAT pdata pdata SEGMENT $pdata$double_buf_fill_sse DD imagerel $LN6 DD imagerel $LN6+428 DD imagerel $unwind$double_buf_fill_sse pdata ENDS ; COMDAT pdata pdata SEGMENT $pdata$double_buf_fill_avx DD imagerel $LN6 DD imagerel $LN6+285 DD imagerel $unwind$double_buf_fill_avx pdata ENDS ; COMDAT pdata pdata SEGMENT $pdata$double_buf_fill_512 DD imagerel $LN6 DD imagerel $LN6+233 DD imagerel $unwind$double_buf_fill_512 pdata ENDS ; COMDAT rtc$TMZ rtc$TMZ SEGMENT _RTC_Shutdown.rtc$TMZ DQ FLAT:_RTC_Shutdown rtc$TMZ ENDS ; COMDAT rtc$IMZ rtc$IMZ SEGMENT _RTC_InitBase.rtc$IMZ DQ FLAT:_RTC_InitBase rtc$IMZ ENDS ; COMDAT xdata xdata SEGMENT $unwind$double_buf_fill_512 DD 02d062801H DD 011a231fH DD 07013003aH DD 0d0115012H xdata ENDS ; COMDAT xdata xdata SEGMENT $unwind$double_buf_fill_avx DD 02d062801H DD 011a231fH DD 07013002eH DD 0d0115012H xdata ENDS ; COMDAT xdata xdata SEGMENT $unwind$double_buf_fill_sse DD 025051d01H DD 0118231dH DD 070110027H DD 05010H xdata ENDS ; COMDAT xdata xdata SEGMENT $unwind$float_buf_fill_512 DD 02d062801H DD 011a231fH DD 07013003aH DD 0d0115012H xdata ENDS ; COMDAT xdata xdata SEGMENT $unwind$float_buf_fill_avx DD 02d062801H DD 011a231fH DD 07013002eH DD 0d0115012H xdata ENDS ; COMDAT xdata xdata SEGMENT $unwind$float_buf_fill_sse DD 025051d01H DD 0118231dH DD 070110027H DD 05010H xdata ENDS ; COMDAT xdata xdata SEGMENT $unwind$double_buf_scalar_mul_512 DD 02d062d01H DD 011f2324H DD 070180056H DD 0d0165017H xdata ENDS ; COMDAT xdata xdata SEGMENT $unwind$double_buf_scalar_mul_avx DD 02d062d01H DD 011f2324H DD 07018004eH DD 0d0165017H xdata ENDS ; COMDAT xdata xdata SEGMENT $unwind$double_buf_scalar_mul_sse DD 025052201H DD 011d2322H DD 070160057H DD 05015H xdata ENDS ; COMDAT xdata xdata SEGMENT $unwind$float_buf_scalar_mul_512 DD 02d062d01H DD 011f2324H DD 070180046H DD 0d0165017H xdata ENDS ; COMDAT xdata xdata SEGMENT $unwind$float_buf_scalar_mul_avx DD 02d062d01H DD 011f2324H DD 07018003eH DD 0d0165017H xdata ENDS ; COMDAT xdata xdata SEGMENT $unwind$float_buf_scalar_mul_sse DD 025052201H DD 011d2322H DD 07016003fH DD 05015H xdata ENDS ; COMDAT xdata xdata SEGMENT $unwind$double_buf_sub_512 DD 02d062d01H DD 011f2324H DD 070180036H DD 0d0165017H xdata ENDS ; COMDAT xdata xdata SEGMENT $unwind$double_buf_sub_avx DD 02d062d01H DD 011f2324H DD 070180036H DD 0d0165017H xdata ENDS ; COMDAT xdata xdata SEGMENT $unwind$double_buf_sub_sse DD 025052201H DD 011d2322H DD 070160051H DD 05015H xdata ENDS ; COMDAT xdata xdata SEGMENT $unwind$float_buf_sub_512 DD 02d062d01H DD 011f2324H DD 070180036H DD 0d0165017H xdata ENDS ; COMDAT xdata xdata SEGMENT $unwind$float_buf_sub_avx DD 02d062d01H DD 011f2324H DD 070180036H DD 0d0165017H xdata ENDS ; COMDAT xdata xdata SEGMENT $unwind$float_buf_sub_sse DD 025052201H DD 011d2322H DD 070160039H DD 05015H xdata ENDS ; COMDAT xdata xdata SEGMENT $unwind$double_buf_add_512 DD 02d062d01H DD 011f2324H DD 070180046H DD 0d0165017H xdata ENDS ; COMDAT xdata xdata SEGMENT $unwind$double_buf_add_avx DD 02d062d01H DD 011f2324H DD 07018004aH DD 0d0165017H xdata ENDS ; COMDAT xdata xdata SEGMENT $unwind$double_buf_add_sse DD 025052201H DD 011d2322H DD 070160051H DD 05015H xdata ENDS ; COMDAT xdata xdata SEGMENT $unwind$float_buf_add_512 DD 02d062d01H DD 011f2324H DD 070180036H DD 0d0165017H xdata ENDS ; COMDAT xdata xdata SEGMENT $unwind$float_buf_add_avx DD 02d062d01H DD 011f2324H DD 07018003aH DD 0d0165017H xdata ENDS ; COMDAT xdata xdata SEGMENT $unwind$float_buf_add_sse DD 025052201H DD 011d2322H DD 070160039H DD 05015H xdata ENDS ; Function compile flags: /Odt ; COMDAT __JustMyCode_Default _TEXT SEGMENT __JustMyCode_Default PROC ; COMDAT 00000 c2 00 00 ret 0 __JustMyCode_Default ENDP _TEXT ENDS ; Function compile flags: /Odtp /RTCsu /ZI ; File D:\platform-dev\StgSharp.Native\sn-src\m.bufop.x86.c ; COMDAT double_buf_fill_512 _TEXT SEGMENT vec$ = 64 i$1 = 152 ans$ = 464 scalar$ = 472 count$ = 480 double_buf_fill_512 PROC ; COMDAT ; 63 : { $LN6: 00000 4c 89 44 24 18 mov QWORD PTR [rsp+24], r8 00005 48 89 54 24 10 mov QWORD PTR [rsp+16], rdx 0000a 48 89 4c 24 08 mov QWORD PTR [rsp+8], rcx 0000f 41 55 push r13 00011 55 push rbp 00012 57 push rdi 00013 48 81 ec d0 01 00 00 sub rsp, 464 ; 000001d0H 0001a 4c 8d 6c 24 20 lea r13, QWORD PTR [rsp+32] 0001f 48 8d 6c 24 60 lea rbp, QWORD PTR [rsp+96] 00024 48 83 e5 c0 and rbp, -64 ; ffffffffffffffc0H 00028 48 8d 0d 00 00 00 00 lea rcx, OFFSET FLAT:__BAFF6ACF_m@bufop@x86@c 0002f e8 00 00 00 00 call __CheckForDebuggerJustMyCode 00034 90 npad 1 ; 64 : register __m512d vec = _mm512_broadcastsd_pd(_mm_loadu_pd(scalar)); 00035 49 8b 85 d8 01 00 00 mov rax, QWORD PTR scalar$[r13] 0003c 0f 10 00 movups xmm0, XMMWORD PTR [rax] 0003f 62 f2 fd 48 19 c0 vbroadcastsd zmm0, xmm0 00045 62 f1 fd 48 11 45 01 vmovupd ZMMWORD PTR vec$[rbp], zmm0 ; 65 : for (size_t i = 0; i < count; i++) { 0004c 48 c7 85 98 00 00 00 00 00 00 00 mov QWORD PTR i$1[rbp], 0 00057 eb 11 jmp SHORT $LN4@double_buf $LN2@double_buf: 00059 48 8b 85 98 00 00 00 mov rax, QWORD PTR i$1[rbp] 00060 48 ff c0 inc rax 00063 48 89 85 98 00 00 00 mov QWORD PTR i$1[rbp], rax $LN4@double_buf: 0006a 49 8b 85 e0 01 00 00 mov rax, QWORD PTR count$[r13] 00071 48 39 85 98 00 00 00 cmp QWORD PTR i$1[rbp], rax 00078 73 63 jae SHORT $LN3@double_buf ; 66 : ans[i].f64_z[0] = vec; 0007a 48 69 85 98 00 00 00 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 00085 49 8b 8d d0 01 00 00 mov rcx, QWORD PTR ans$[r13] 0008c 48 03 c8 add rcx, rax 0008f 48 8b c1 mov rax, rcx 00092 b9 40 00 00 00 mov ecx, 64 ; 00000040H 00097 48 6b c9 00 imul rcx, rcx, 0 0009b 62 f1 fd 48 10 45 01 vmovupd zmm0, ZMMWORD PTR vec$[rbp] 000a2 62 f1 fd 48 11 04 08 vmovupd ZMMWORD PTR [rax+rcx], zmm0 ; 67 : ans[i].f64_z[1] = vec; 000a9 48 69 85 98 00 00 00 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 000b4 49 8b 8d d0 01 00 00 mov rcx, QWORD PTR ans$[r13] 000bb 48 03 c8 add rcx, rax 000be 48 8b c1 mov rax, rcx 000c1 b9 40 00 00 00 mov ecx, 64 ; 00000040H 000c6 48 6b c9 01 imul rcx, rcx, 1 000ca 62 f1 fd 48 10 45 01 vmovupd zmm0, ZMMWORD PTR vec$[rbp] 000d1 62 f1 fd 48 11 04 08 vmovupd ZMMWORD PTR [rax+rcx], zmm0 ; 68 : } 000d8 e9 7c ff ff ff jmp $LN2@double_buf $LN3@double_buf: ; 69 : } 000dd 49 8d a5 b0 01 00 00 lea rsp, QWORD PTR [r13+432] 000e4 5f pop rdi 000e5 5d pop rbp 000e6 41 5d pop r13 000e8 c3 ret 0 double_buf_fill_512 ENDP _TEXT ENDS ; Function compile flags: /Odtp /RTCsu /ZI ; File D:\platform-dev\StgSharp.Native\sn-src\m.bufop.x86.c ; COMDAT double_buf_fill_avx _TEXT SEGMENT vec$ = 32 i$1 = 88 ans$ = 368 scalar$ = 376 count$ = 384 double_buf_fill_avx PROC ; COMDAT ; 52 : { $LN6: 00000 4c 89 44 24 18 mov QWORD PTR [rsp+24], r8 00005 48 89 54 24 10 mov QWORD PTR [rsp+16], rdx 0000a 48 89 4c 24 08 mov QWORD PTR [rsp+8], rcx 0000f 41 55 push r13 00011 55 push rbp 00012 57 push rdi 00013 48 81 ec 70 01 00 00 sub rsp, 368 ; 00000170H 0001a 4c 8d 6c 24 20 lea r13, QWORD PTR [rsp+32] 0001f 48 8d 6c 24 40 lea rbp, QWORD PTR [rsp+64] 00024 48 83 e5 e0 and rbp, -32 ; ffffffffffffffe0H 00028 48 8d 0d 00 00 00 00 lea rcx, OFFSET FLAT:__BAFF6ACF_m@bufop@x86@c 0002f e8 00 00 00 00 call __CheckForDebuggerJustMyCode 00034 90 npad 1 ; 53 : register __m256d vec = _mm256_broadcast_sd(((double *)(scalar->data))); 00035 49 8b 85 78 01 00 00 mov rax, QWORD PTR scalar$[r13] 0003c c4 e2 7d 19 00 vbroadcastsd ymm0, QWORD PTR [rax] 00041 c5 fd 11 45 20 vmovupd YMMWORD PTR vec$[rbp], ymm0 ; 54 : for (size_t i = 0; i < count; i++) { 00046 48 c7 45 58 00 00 00 00 mov QWORD PTR i$1[rbp], 0 0004e eb 0b jmp SHORT $LN4@double_buf $LN2@double_buf: 00050 48 8b 45 58 mov rax, QWORD PTR i$1[rbp] 00054 48 ff c0 inc rax 00057 48 89 45 58 mov QWORD PTR i$1[rbp], rax $LN4@double_buf: 0005b 49 8b 85 80 01 00 00 mov rax, QWORD PTR count$[r13] 00062 48 39 45 58 cmp QWORD PTR i$1[rbp], rax 00066 0f 83 a5 00 00 00 jae $LN3@double_buf ; 55 : ans[i].f64_y[0] = vec; 0006c 48 69 45 58 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 00074 49 8b 8d 70 01 00 00 mov rcx, QWORD PTR ans$[r13] 0007b 48 03 c8 add rcx, rax 0007e 48 8b c1 mov rax, rcx 00081 b9 20 00 00 00 mov ecx, 32 ; 00000020H 00086 48 6b c9 00 imul rcx, rcx, 0 0008a c5 fd 10 45 20 vmovupd ymm0, YMMWORD PTR vec$[rbp] 0008f c5 fd 11 04 08 vmovupd YMMWORD PTR [rax+rcx], ymm0 ; 56 : ans[i].f64_y[1] = vec; 00094 48 69 45 58 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 0009c 49 8b 8d 70 01 00 00 mov rcx, QWORD PTR ans$[r13] 000a3 48 03 c8 add rcx, rax 000a6 48 8b c1 mov rax, rcx 000a9 b9 20 00 00 00 mov ecx, 32 ; 00000020H 000ae 48 6b c9 01 imul rcx, rcx, 1 000b2 c5 fd 10 45 20 vmovupd ymm0, YMMWORD PTR vec$[rbp] 000b7 c5 fd 11 04 08 vmovupd YMMWORD PTR [rax+rcx], ymm0 ; 57 : ans[i].f64_y[2] = vec; 000bc 48 69 45 58 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 000c4 49 8b 8d 70 01 00 00 mov rcx, QWORD PTR ans$[r13] 000cb 48 03 c8 add rcx, rax 000ce 48 8b c1 mov rax, rcx 000d1 b9 20 00 00 00 mov ecx, 32 ; 00000020H 000d6 48 6b c9 02 imul rcx, rcx, 2 000da c5 fd 10 45 20 vmovupd ymm0, YMMWORD PTR vec$[rbp] 000df c5 fd 11 04 08 vmovupd YMMWORD PTR [rax+rcx], ymm0 ; 58 : ans[i].f64_y[3] = vec; 000e4 48 69 45 58 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 000ec 49 8b 8d 70 01 00 00 mov rcx, QWORD PTR ans$[r13] 000f3 48 03 c8 add rcx, rax 000f6 48 8b c1 mov rax, rcx 000f9 b9 20 00 00 00 mov ecx, 32 ; 00000020H 000fe 48 6b c9 03 imul rcx, rcx, 3 00102 c5 fd 10 45 20 vmovupd ymm0, YMMWORD PTR vec$[rbp] 00107 c5 fd 11 04 08 vmovupd YMMWORD PTR [rax+rcx], ymm0 ; 59 : } 0010c e9 3f ff ff ff jmp $LN2@double_buf $LN3@double_buf: ; 60 : } 00111 49 8d a5 50 01 00 00 lea rsp, QWORD PTR [r13+336] 00118 5f pop rdi 00119 5d pop rbp 0011a 41 5d pop r13 0011c c3 ret 0 double_buf_fill_avx ENDP _TEXT ENDS ; Function compile flags: /Odtp /RTCsu /ZI ; File D:\platform-dev\StgSharp.Native\sn-src\m.bufop.x86.c ; COMDAT double_buf_fill_sse _TEXT SEGMENT vec$ = 16 i$1 = 56 ans$ = 304 scalar$ = 312 count$ = 320 double_buf_fill_sse PROC ; COMDAT ; 37 : { $LN6: 00000 4c 89 44 24 18 mov QWORD PTR [rsp+24], r8 00005 48 89 54 24 10 mov QWORD PTR [rsp+16], rdx 0000a 48 89 4c 24 08 mov QWORD PTR [rsp+8], rcx 0000f 55 push rbp 00010 57 push rdi 00011 48 81 ec 38 01 00 00 sub rsp, 312 ; 00000138H 00018 48 8d 6c 24 20 lea rbp, QWORD PTR [rsp+32] 0001d 48 8d 0d 00 00 00 00 lea rcx, OFFSET FLAT:__BAFF6ACF_m@bufop@x86@c 00024 e8 00 00 00 00 call __CheckForDebuggerJustMyCode 00029 90 npad 1 ; 38 : register __m128d vec = _mm_set1_pd(((double *)(scalar->data))[0]); 0002a b8 08 00 00 00 mov eax, 8 0002f 48 6b c0 00 imul rax, rax, 0 00033 48 8b 8d 38 01 00 00 mov rcx, QWORD PTR scalar$[rbp] 0003a f2 0f 10 04 01 movsd xmm0, QWORD PTR [rcx+rax] 0003f 66 0f 14 c0 unpcklpd xmm0, xmm0 00043 0f 29 45 10 movaps XMMWORD PTR vec$[rbp], xmm0 ; 39 : for (size_t i = 0; i < count; i++) { 00047 48 c7 45 38 00 00 00 00 mov QWORD PTR i$1[rbp], 0 0004f eb 0b jmp SHORT $LN4@double_buf $LN2@double_buf: 00051 48 8b 45 38 mov rax, QWORD PTR i$1[rbp] 00055 48 ff c0 inc rax 00058 48 89 45 38 mov QWORD PTR i$1[rbp], rax $LN4@double_buf: 0005c 48 8b 85 40 01 00 00 mov rax, QWORD PTR count$[rbp] 00063 48 39 45 38 cmp QWORD PTR i$1[rbp], rax 00067 0f 83 35 01 00 00 jae $LN3@double_buf ; 40 : ans[i].f64_x[0] = vec; 0006d 48 69 45 38 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 00075 48 8b 8d 30 01 00 00 mov rcx, QWORD PTR ans$[rbp] 0007c 48 03 c8 add rcx, rax 0007f 48 8b c1 mov rax, rcx 00082 b9 10 00 00 00 mov ecx, 16 00087 48 6b c9 00 imul rcx, rcx, 0 0008b 0f 28 45 10 movaps xmm0, XMMWORD PTR vec$[rbp] 0008f 0f 11 04 08 movups XMMWORD PTR [rax+rcx], xmm0 ; 41 : ans[i].f64_x[1] = vec; 00093 48 69 45 38 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 0009b 48 8b 8d 30 01 00 00 mov rcx, QWORD PTR ans$[rbp] 000a2 48 03 c8 add rcx, rax 000a5 48 8b c1 mov rax, rcx 000a8 b9 10 00 00 00 mov ecx, 16 000ad 48 6b c9 01 imul rcx, rcx, 1 000b1 0f 28 45 10 movaps xmm0, XMMWORD PTR vec$[rbp] 000b5 0f 11 04 08 movups XMMWORD PTR [rax+rcx], xmm0 ; 42 : ans[i].f64_x[2] = vec; 000b9 48 69 45 38 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 000c1 48 8b 8d 30 01 00 00 mov rcx, QWORD PTR ans$[rbp] 000c8 48 03 c8 add rcx, rax 000cb 48 8b c1 mov rax, rcx 000ce b9 10 00 00 00 mov ecx, 16 000d3 48 6b c9 02 imul rcx, rcx, 2 000d7 0f 28 45 10 movaps xmm0, XMMWORD PTR vec$[rbp] 000db 0f 11 04 08 movups XMMWORD PTR [rax+rcx], xmm0 ; 43 : ans[i].f64_x[3] = vec; 000df 48 69 45 38 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 000e7 48 8b 8d 30 01 00 00 mov rcx, QWORD PTR ans$[rbp] 000ee 48 03 c8 add rcx, rax 000f1 48 8b c1 mov rax, rcx 000f4 b9 10 00 00 00 mov ecx, 16 000f9 48 6b c9 03 imul rcx, rcx, 3 000fd 0f 28 45 10 movaps xmm0, XMMWORD PTR vec$[rbp] 00101 0f 11 04 08 movups XMMWORD PTR [rax+rcx], xmm0 ; 44 : ans[i].f64_x[4] = vec; 00105 48 69 45 38 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 0010d 48 8b 8d 30 01 00 00 mov rcx, QWORD PTR ans$[rbp] 00114 48 03 c8 add rcx, rax 00117 48 8b c1 mov rax, rcx 0011a b9 10 00 00 00 mov ecx, 16 0011f 48 6b c9 04 imul rcx, rcx, 4 00123 0f 28 45 10 movaps xmm0, XMMWORD PTR vec$[rbp] 00127 0f 11 04 08 movups XMMWORD PTR [rax+rcx], xmm0 ; 45 : ans[i].f64_x[5] = vec; 0012b 48 69 45 38 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 00133 48 8b 8d 30 01 00 00 mov rcx, QWORD PTR ans$[rbp] 0013a 48 03 c8 add rcx, rax 0013d 48 8b c1 mov rax, rcx 00140 b9 10 00 00 00 mov ecx, 16 00145 48 6b c9 05 imul rcx, rcx, 5 00149 0f 28 45 10 movaps xmm0, XMMWORD PTR vec$[rbp] 0014d 0f 11 04 08 movups XMMWORD PTR [rax+rcx], xmm0 ; 46 : ans[i].f64_x[6] = vec; 00151 48 69 45 38 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 00159 48 8b 8d 30 01 00 00 mov rcx, QWORD PTR ans$[rbp] 00160 48 03 c8 add rcx, rax 00163 48 8b c1 mov rax, rcx 00166 b9 10 00 00 00 mov ecx, 16 0016b 48 6b c9 06 imul rcx, rcx, 6 0016f 0f 28 45 10 movaps xmm0, XMMWORD PTR vec$[rbp] 00173 0f 11 04 08 movups XMMWORD PTR [rax+rcx], xmm0 ; 47 : ans[i].f64_x[7] = vec; 00177 48 69 45 38 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 0017f 48 8b 8d 30 01 00 00 mov rcx, QWORD PTR ans$[rbp] 00186 48 03 c8 add rcx, rax 00189 48 8b c1 mov rax, rcx 0018c b9 10 00 00 00 mov ecx, 16 00191 48 6b c9 07 imul rcx, rcx, 7 00195 0f 28 45 10 movaps xmm0, XMMWORD PTR vec$[rbp] 00199 0f 11 04 08 movups XMMWORD PTR [rax+rcx], xmm0 ; 48 : } 0019d e9 af fe ff ff jmp $LN2@double_buf $LN3@double_buf: ; 49 : } 001a2 48 8d a5 18 01 00 00 lea rsp, QWORD PTR [rbp+280] 001a9 5f pop rdi 001aa 5d pop rbp 001ab c3 ret 0 double_buf_fill_sse ENDP _TEXT ENDS ; Function compile flags: /Odtp /RTCsu /ZI ; File D:\platform-dev\StgSharp.Native\sn-src\m.bufop.x86.c ; COMDAT float_buf_fill_512 _TEXT SEGMENT vec$ = 64 i$1 = 152 ans$ = 464 scalar$ = 472 count$ = 480 float_buf_fill_512 PROC ; COMDAT ; 29 : { $LN6: 00000 4c 89 44 24 18 mov QWORD PTR [rsp+24], r8 00005 48 89 54 24 10 mov QWORD PTR [rsp+16], rdx 0000a 48 89 4c 24 08 mov QWORD PTR [rsp+8], rcx 0000f 41 55 push r13 00011 55 push rbp 00012 57 push rdi 00013 48 81 ec d0 01 00 00 sub rsp, 464 ; 000001d0H 0001a 4c 8d 6c 24 20 lea r13, QWORD PTR [rsp+32] 0001f 48 8d 6c 24 60 lea rbp, QWORD PTR [rsp+96] 00024 48 83 e5 c0 and rbp, -64 ; ffffffffffffffc0H 00028 48 8d 0d 00 00 00 00 lea rcx, OFFSET FLAT:__BAFF6ACF_m@bufop@x86@c 0002f e8 00 00 00 00 call __CheckForDebuggerJustMyCode 00034 90 npad 1 ; 30 : register __m512 vec = _mm512_broadcastss_ps(((__m128 *)(scalar->data))[0]); 00035 b8 10 00 00 00 mov eax, 16 0003a 48 6b c0 00 imul rax, rax, 0 0003e 49 8b 8d d8 01 00 00 mov rcx, QWORD PTR scalar$[r13] 00045 62 f2 7d 48 18 04 01 vbroadcastss zmm0, XMMWORD PTR [rcx+rax] 0004c 62 f1 7c 48 11 45 01 vmovups ZMMWORD PTR vec$[rbp], zmm0 ; 31 : for (size_t i = 0; i < count; i++) { 00053 48 c7 85 98 00 00 00 00 00 00 00 mov QWORD PTR i$1[rbp], 0 0005e eb 11 jmp SHORT $LN4@float_buf_ $LN2@float_buf_: 00060 48 8b 85 98 00 00 00 mov rax, QWORD PTR i$1[rbp] 00067 48 ff c0 inc rax 0006a 48 89 85 98 00 00 00 mov QWORD PTR i$1[rbp], rax $LN4@float_buf_: 00071 49 8b 85 e0 01 00 00 mov rax, QWORD PTR count$[r13] 00078 48 39 85 98 00 00 00 cmp QWORD PTR i$1[rbp], rax 0007f 73 2e jae SHORT $LN3@float_buf_ ; 32 : ans[i].f32_z[0] = vec; 00081 48 6b 85 98 00 00 00 40 imul rax, QWORD PTR i$1[rbp], 64 ; 00000040H 00089 49 8b 8d d0 01 00 00 mov rcx, QWORD PTR ans$[r13] 00090 48 03 c8 add rcx, rax 00093 48 8b c1 mov rax, rcx 00096 b9 40 00 00 00 mov ecx, 64 ; 00000040H 0009b 48 6b c9 00 imul rcx, rcx, 0 0009f 62 f1 7c 48 10 45 01 vmovups zmm0, ZMMWORD PTR vec$[rbp] 000a6 62 f1 7c 48 11 04 08 vmovups ZMMWORD PTR [rax+rcx], zmm0 ; 33 : } 000ad eb b1 jmp SHORT $LN2@float_buf_ $LN3@float_buf_: ; 34 : } 000af 49 8d a5 b0 01 00 00 lea rsp, QWORD PTR [r13+432] 000b6 5f pop rdi 000b7 5d pop rbp 000b8 41 5d pop r13 000ba c3 ret 0 float_buf_fill_512 ENDP _TEXT ENDS ; Function compile flags: /Odtp /RTCsu /ZI ; File D:\platform-dev\StgSharp.Native\sn-src\m.bufop.x86.c ; COMDAT float_buf_fill_avx _TEXT SEGMENT vec$ = 32 i$1 = 88 ans$ = 368 scalar$ = 376 count$ = 384 float_buf_fill_avx PROC ; COMDAT ; 20 : { $LN6: 00000 4c 89 44 24 18 mov QWORD PTR [rsp+24], r8 00005 48 89 54 24 10 mov QWORD PTR [rsp+16], rdx 0000a 48 89 4c 24 08 mov QWORD PTR [rsp+8], rcx 0000f 41 55 push r13 00011 55 push rbp 00012 57 push rdi 00013 48 81 ec 70 01 00 00 sub rsp, 368 ; 00000170H 0001a 4c 8d 6c 24 20 lea r13, QWORD PTR [rsp+32] 0001f 48 8d 6c 24 40 lea rbp, QWORD PTR [rsp+64] 00024 48 83 e5 e0 and rbp, -32 ; ffffffffffffffe0H 00028 48 8d 0d 00 00 00 00 lea rcx, OFFSET FLAT:__BAFF6ACF_m@bufop@x86@c 0002f e8 00 00 00 00 call __CheckForDebuggerJustMyCode 00034 90 npad 1 ; 21 : register __m256 vec = _mm256_broadcast_ss(((float *)(scalar->data))); 00035 49 8b 85 78 01 00 00 mov rax, QWORD PTR scalar$[r13] 0003c c4 e2 7d 18 00 vbroadcastss ymm0, DWORD PTR [rax] 00041 c5 fc 11 45 20 vmovups YMMWORD PTR vec$[rbp], ymm0 ; 22 : for (size_t i = 0; i < count; i++) { 00046 48 c7 45 58 00 00 00 00 mov QWORD PTR i$1[rbp], 0 0004e eb 0b jmp SHORT $LN4@float_buf_ $LN2@float_buf_: 00050 48 8b 45 58 mov rax, QWORD PTR i$1[rbp] 00054 48 ff c0 inc rax 00057 48 89 45 58 mov QWORD PTR i$1[rbp], rax $LN4@float_buf_: 0005b 49 8b 85 80 01 00 00 mov rax, QWORD PTR count$[r13] 00062 48 39 45 58 cmp QWORD PTR i$1[rbp], rax 00066 73 4c jae SHORT $LN3@float_buf_ ; 23 : ans[i].f32_y[0] = vec; 00068 48 6b 45 58 40 imul rax, QWORD PTR i$1[rbp], 64 ; 00000040H 0006d 49 8b 8d 70 01 00 00 mov rcx, QWORD PTR ans$[r13] 00074 48 03 c8 add rcx, rax 00077 48 8b c1 mov rax, rcx 0007a b9 20 00 00 00 mov ecx, 32 ; 00000020H 0007f 48 6b c9 00 imul rcx, rcx, 0 00083 c5 fc 10 45 20 vmovups ymm0, YMMWORD PTR vec$[rbp] 00088 c5 fc 11 04 08 vmovups YMMWORD PTR [rax+rcx], ymm0 ; 24 : ans[i].f32_y[1] = vec; 0008d 48 6b 45 58 40 imul rax, QWORD PTR i$1[rbp], 64 ; 00000040H 00092 49 8b 8d 70 01 00 00 mov rcx, QWORD PTR ans$[r13] 00099 48 03 c8 add rcx, rax 0009c 48 8b c1 mov rax, rcx 0009f b9 20 00 00 00 mov ecx, 32 ; 00000020H 000a4 48 6b c9 01 imul rcx, rcx, 1 000a8 c5 fc 10 45 20 vmovups ymm0, YMMWORD PTR vec$[rbp] 000ad c5 fc 11 04 08 vmovups YMMWORD PTR [rax+rcx], ymm0 ; 25 : } 000b2 eb 9c jmp SHORT $LN2@float_buf_ $LN3@float_buf_: ; 26 : } 000b4 49 8d a5 50 01 00 00 lea rsp, QWORD PTR [r13+336] 000bb 5f pop rdi 000bc 5d pop rbp 000bd 41 5d pop r13 000bf c3 ret 0 float_buf_fill_avx ENDP _TEXT ENDS ; Function compile flags: /Odtp /RTCsu /ZI ; File D:\platform-dev\StgSharp.Native\sn-src\m.bufop.x86.c ; COMDAT float_buf_fill_sse _TEXT SEGMENT vec$ = 16 i$1 = 56 ans$ = 304 scalar$ = 312 count$ = 320 float_buf_fill_sse PROC ; COMDAT ; 9 : { $LN6: 00000 4c 89 44 24 18 mov QWORD PTR [rsp+24], r8 00005 48 89 54 24 10 mov QWORD PTR [rsp+16], rdx 0000a 48 89 4c 24 08 mov QWORD PTR [rsp+8], rcx 0000f 55 push rbp 00010 57 push rdi 00011 48 81 ec 38 01 00 00 sub rsp, 312 ; 00000138H 00018 48 8d 6c 24 20 lea rbp, QWORD PTR [rsp+32] 0001d 48 8d 0d 00 00 00 00 lea rcx, OFFSET FLAT:__BAFF6ACF_m@bufop@x86@c 00024 e8 00 00 00 00 call __CheckForDebuggerJustMyCode 00029 90 npad 1 ; 10 : register __m128 vec = _mm_set_ps1(((float *)(scalar->data))[0]); 0002a b8 04 00 00 00 mov eax, 4 0002f 48 6b c0 00 imul rax, rax, 0 00033 48 8b 8d 38 01 00 00 mov rcx, QWORD PTR scalar$[rbp] 0003a f3 0f 10 04 01 movss xmm0, DWORD PTR [rcx+rax] 0003f 0f c6 c0 00 shufps xmm0, xmm0, 0 00043 0f 29 45 10 movaps XMMWORD PTR vec$[rbp], xmm0 ; 11 : for (size_t i = 0; i < count; i++) { 00047 48 c7 45 38 00 00 00 00 mov QWORD PTR i$1[rbp], 0 0004f eb 0b jmp SHORT $LN4@float_buf_ $LN2@float_buf_: 00051 48 8b 45 38 mov rax, QWORD PTR i$1[rbp] 00055 48 ff c0 inc rax 00058 48 89 45 38 mov QWORD PTR i$1[rbp], rax $LN4@float_buf_: 0005c 48 8b 85 40 01 00 00 mov rax, QWORD PTR count$[rbp] 00063 48 39 45 38 cmp QWORD PTR i$1[rbp], rax 00067 0f 83 91 00 00 00 jae $LN3@float_buf_ ; 12 : ans[i].f32_x[0] = vec; 0006d 48 6b 45 38 40 imul rax, QWORD PTR i$1[rbp], 64 ; 00000040H 00072 48 8b 8d 30 01 00 00 mov rcx, QWORD PTR ans$[rbp] 00079 48 03 c8 add rcx, rax 0007c 48 8b c1 mov rax, rcx 0007f b9 10 00 00 00 mov ecx, 16 00084 48 6b c9 00 imul rcx, rcx, 0 00088 0f 28 45 10 movaps xmm0, XMMWORD PTR vec$[rbp] 0008c 0f 11 04 08 movups XMMWORD PTR [rax+rcx], xmm0 ; 13 : ans[i].f32_x[1] = vec; 00090 48 6b 45 38 40 imul rax, QWORD PTR i$1[rbp], 64 ; 00000040H 00095 48 8b 8d 30 01 00 00 mov rcx, QWORD PTR ans$[rbp] 0009c 48 03 c8 add rcx, rax 0009f 48 8b c1 mov rax, rcx 000a2 b9 10 00 00 00 mov ecx, 16 000a7 48 6b c9 01 imul rcx, rcx, 1 000ab 0f 28 45 10 movaps xmm0, XMMWORD PTR vec$[rbp] 000af 0f 11 04 08 movups XMMWORD PTR [rax+rcx], xmm0 ; 14 : ans[i].f32_x[2] = vec; 000b3 48 6b 45 38 40 imul rax, QWORD PTR i$1[rbp], 64 ; 00000040H 000b8 48 8b 8d 30 01 00 00 mov rcx, QWORD PTR ans$[rbp] 000bf 48 03 c8 add rcx, rax 000c2 48 8b c1 mov rax, rcx 000c5 b9 10 00 00 00 mov ecx, 16 000ca 48 6b c9 02 imul rcx, rcx, 2 000ce 0f 28 45 10 movaps xmm0, XMMWORD PTR vec$[rbp] 000d2 0f 11 04 08 movups XMMWORD PTR [rax+rcx], xmm0 ; 15 : ans[i].f32_x[3] = vec; 000d6 48 6b 45 38 40 imul rax, QWORD PTR i$1[rbp], 64 ; 00000040H 000db 48 8b 8d 30 01 00 00 mov rcx, QWORD PTR ans$[rbp] 000e2 48 03 c8 add rcx, rax 000e5 48 8b c1 mov rax, rcx 000e8 b9 10 00 00 00 mov ecx, 16 000ed 48 6b c9 03 imul rcx, rcx, 3 000f1 0f 28 45 10 movaps xmm0, XMMWORD PTR vec$[rbp] 000f5 0f 11 04 08 movups XMMWORD PTR [rax+rcx], xmm0 ; 16 : } 000f9 e9 53 ff ff ff jmp $LN2@float_buf_ $LN3@float_buf_: ; 17 : } 000fe 48 8d a5 18 01 00 00 lea rsp, QWORD PTR [rbp+280] 00105 5f pop rdi 00106 5d pop rbp 00107 c3 ret 0 float_buf_fill_sse ENDP _TEXT ENDS ; Function compile flags: /Odtp /RTCsu /ZI ; File D:\platform-dev\StgSharp.Native\sn-src\m.bufop.x86.c ; COMDAT double_buf_scalar_mul_512 _TEXT SEGMENT vec$ = 64 i$1 = 152 c0$2 = 192 c1$3 = 320 right$ = 688 ans$ = 696 scalar$ = 704 count$ = 712 double_buf_scalar_mul_512 PROC ; COMDAT ; 313 : { $LN6: 00000 4c 89 4c 24 20 mov QWORD PTR [rsp+32], r9 00005 4c 89 44 24 18 mov QWORD PTR [rsp+24], r8 0000a 48 89 54 24 10 mov QWORD PTR [rsp+16], rdx 0000f 48 89 4c 24 08 mov QWORD PTR [rsp+8], rcx 00014 41 55 push r13 00016 55 push rbp 00017 57 push rdi 00018 48 81 ec b0 02 00 00 sub rsp, 688 ; 000002b0H 0001f 4c 8d 6c 24 20 lea r13, QWORD PTR [rsp+32] 00024 48 8d 6c 24 60 lea rbp, QWORD PTR [rsp+96] 00029 48 83 e5 c0 and rbp, -64 ; ffffffffffffffc0H 0002d 48 8d 0d 00 00 00 00 lea rcx, OFFSET FLAT:__BAFF6ACF_m@bufop@x86@c 00034 e8 00 00 00 00 call __CheckForDebuggerJustMyCode 00039 90 npad 1 ; 314 : register __m512d vec = _mm512_broadcastsd_pd(_mm_load_pd(scalar)); 0003a 49 8b 85 c0 02 00 00 mov rax, QWORD PTR scalar$[r13] 00041 0f 10 00 movups xmm0, XMMWORD PTR [rax] 00044 62 f2 fd 48 19 c0 vbroadcastsd zmm0, xmm0 0004a 62 f1 fd 48 11 45 01 vmovupd ZMMWORD PTR vec$[rbp], zmm0 ; 315 : for (size_t i = 0; i < count; i++) { 00051 48 c7 85 98 00 00 00 00 00 00 00 mov QWORD PTR i$1[rbp], 0 0005c eb 11 jmp SHORT $LN4@double_buf $LN2@double_buf: 0005e 48 8b 85 98 00 00 00 mov rax, QWORD PTR i$1[rbp] 00065 48 ff c0 inc rax 00068 48 89 85 98 00 00 00 mov QWORD PTR i$1[rbp], rax $LN4@double_buf: 0006f 49 8b 85 c8 02 00 00 mov rax, QWORD PTR count$[r13] 00076 48 39 85 98 00 00 00 cmp QWORD PTR i$1[rbp], rax 0007d 0f 83 cf 00 00 00 jae $LN3@double_buf ; 316 : register __m512d c0 = _mm512_mul_pd(right[i].f64_z[0], vec); 00083 48 69 85 98 00 00 00 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 0008e 49 8b 8d b0 02 00 00 mov rcx, QWORD PTR right$[r13] 00095 48 03 c8 add rcx, rax 00098 48 8b c1 mov rax, rcx 0009b b9 40 00 00 00 mov ecx, 64 ; 00000040H 000a0 48 6b c9 00 imul rcx, rcx, 0 000a4 62 f1 fd 48 10 04 08 vmovupd zmm0, ZMMWORD PTR [rax+rcx] 000ab 62 f1 fd 48 59 45 01 vmulpd zmm0, zmm0, ZMMWORD PTR vec$[rbp] 000b2 62 f1 fd 48 11 45 03 vmovupd ZMMWORD PTR c0$2[rbp], zmm0 ; 317 : register __m512d c1 = _mm512_mul_pd(right[i].f64_z[1], vec); 000b9 48 69 85 98 00 00 00 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 000c4 49 8b 8d b0 02 00 00 mov rcx, QWORD PTR right$[r13] 000cb 48 03 c8 add rcx, rax 000ce 48 8b c1 mov rax, rcx 000d1 b9 40 00 00 00 mov ecx, 64 ; 00000040H 000d6 48 6b c9 01 imul rcx, rcx, 1 000da 62 f1 fd 48 10 04 08 vmovupd zmm0, ZMMWORD PTR [rax+rcx] 000e1 62 f1 fd 48 59 45 01 vmulpd zmm0, zmm0, ZMMWORD PTR vec$[rbp] 000e8 62 f1 fd 48 11 45 05 vmovupd ZMMWORD PTR c1$3[rbp], zmm0 ; 318 : ; 319 : ans[i].f64_z[0] = c0; 000ef 48 69 85 98 00 00 00 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 000fa 49 8b 8d b8 02 00 00 mov rcx, QWORD PTR ans$[r13] 00101 48 03 c8 add rcx, rax 00104 48 8b c1 mov rax, rcx 00107 b9 40 00 00 00 mov ecx, 64 ; 00000040H 0010c 48 6b c9 00 imul rcx, rcx, 0 00110 62 f1 fd 48 10 45 03 vmovupd zmm0, ZMMWORD PTR c0$2[rbp] 00117 62 f1 fd 48 11 04 08 vmovupd ZMMWORD PTR [rax+rcx], zmm0 ; 320 : ans[i].f64_z[1] = c1; 0011e 48 69 85 98 00 00 00 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 00129 49 8b 8d b8 02 00 00 mov rcx, QWORD PTR ans$[r13] 00130 48 03 c8 add rcx, rax 00133 48 8b c1 mov rax, rcx 00136 b9 40 00 00 00 mov ecx, 64 ; 00000040H 0013b 48 6b c9 01 imul rcx, rcx, 1 0013f 62 f1 fd 48 10 45 05 vmovupd zmm0, ZMMWORD PTR c1$3[rbp] 00146 62 f1 fd 48 11 04 08 vmovupd ZMMWORD PTR [rax+rcx], zmm0 ; 321 : } 0014d e9 0c ff ff ff jmp $LN2@double_buf $LN3@double_buf: ; 322 : } 00152 49 8d a5 90 02 00 00 lea rsp, QWORD PTR [r13+656] 00159 5f pop rdi 0015a 5d pop rbp 0015b 41 5d pop r13 0015d c3 ret 0 double_buf_scalar_mul_512 ENDP _TEXT ENDS ; Function compile flags: /Odtp /RTCsu /ZI ; File D:\platform-dev\StgSharp.Native\sn-src\m.bufop.x86.c ; COMDAT double_buf_scalar_mul_avx _TEXT SEGMENT vec$ = 32 i$1 = 88 c0$2 = 128 c1$3 = 192 c2$4 = 256 c3$5 = 320 right$ = 624 ans$ = 632 scalar$ = 640 count$ = 648 double_buf_scalar_mul_avx PROC ; COMDAT ; 297 : { $LN6: 00000 4c 89 4c 24 20 mov QWORD PTR [rsp+32], r9 00005 4c 89 44 24 18 mov QWORD PTR [rsp+24], r8 0000a 48 89 54 24 10 mov QWORD PTR [rsp+16], rdx 0000f 48 89 4c 24 08 mov QWORD PTR [rsp+8], rcx 00014 41 55 push r13 00016 55 push rbp 00017 57 push rdi 00018 48 81 ec 70 02 00 00 sub rsp, 624 ; 00000270H 0001f 4c 8d 6c 24 20 lea r13, QWORD PTR [rsp+32] 00024 48 8d 6c 24 40 lea rbp, QWORD PTR [rsp+64] 00029 48 83 e5 e0 and rbp, -32 ; ffffffffffffffe0H 0002d 48 8d 0d 00 00 00 00 lea rcx, OFFSET FLAT:__BAFF6ACF_m@bufop@x86@c 00034 e8 00 00 00 00 call __CheckForDebuggerJustMyCode 00039 90 npad 1 ; 298 : register __m256d vec = _mm256_broadcast_sd(((double *)(scalar->data))); 0003a 49 8b 85 80 02 00 00 mov rax, QWORD PTR scalar$[r13] 00041 c4 e2 7d 19 00 vbroadcastsd ymm0, QWORD PTR [rax] 00046 c5 fd 11 45 20 vmovupd YMMWORD PTR vec$[rbp], ymm0 ; 299 : for (size_t i = 0; i < count; i++) { 0004b 48 c7 45 58 00 00 00 00 mov QWORD PTR i$1[rbp], 0 00053 eb 0b jmp SHORT $LN4@double_buf $LN2@double_buf: 00055 48 8b 45 58 mov rax, QWORD PTR i$1[rbp] 00059 48 ff c0 inc rax 0005c 48 89 45 58 mov QWORD PTR i$1[rbp], rax $LN4@double_buf: 00060 49 8b 85 88 02 00 00 mov rax, QWORD PTR count$[r13] 00067 48 39 45 58 cmp QWORD PTR i$1[rbp], rax 0006b 0f 83 71 01 00 00 jae $LN3@double_buf ; 300 : register __m256d c0 = _mm256_mul_pd(right[i].f64_y[0], vec); 00071 48 69 45 58 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 00079 49 8b 8d 70 02 00 00 mov rcx, QWORD PTR right$[r13] 00080 48 03 c8 add rcx, rax 00083 48 8b c1 mov rax, rcx 00086 b9 20 00 00 00 mov ecx, 32 ; 00000020H 0008b 48 6b c9 00 imul rcx, rcx, 0 0008f c5 fd 10 04 08 vmovupd ymm0, YMMWORD PTR [rax+rcx] 00094 c5 fd 59 45 20 vmulpd ymm0, ymm0, YMMWORD PTR vec$[rbp] 00099 c5 fd 11 85 80 00 00 00 vmovupd YMMWORD PTR c0$2[rbp], ymm0 ; 301 : register __m256d c1 = _mm256_mul_pd(right[i].f64_y[1], vec); 000a1 48 69 45 58 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 000a9 49 8b 8d 70 02 00 00 mov rcx, QWORD PTR right$[r13] 000b0 48 03 c8 add rcx, rax 000b3 48 8b c1 mov rax, rcx 000b6 b9 20 00 00 00 mov ecx, 32 ; 00000020H 000bb 48 6b c9 01 imul rcx, rcx, 1 000bf c5 fd 10 04 08 vmovupd ymm0, YMMWORD PTR [rax+rcx] 000c4 c5 fd 59 45 20 vmulpd ymm0, ymm0, YMMWORD PTR vec$[rbp] 000c9 c5 fd 11 85 c0 00 00 00 vmovupd YMMWORD PTR c1$3[rbp], ymm0 ; 302 : register __m256d c2 = _mm256_mul_pd(right[i].f64_y[2], vec); 000d1 48 69 45 58 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 000d9 49 8b 8d 70 02 00 00 mov rcx, QWORD PTR right$[r13] 000e0 48 03 c8 add rcx, rax 000e3 48 8b c1 mov rax, rcx 000e6 b9 20 00 00 00 mov ecx, 32 ; 00000020H 000eb 48 6b c9 02 imul rcx, rcx, 2 000ef c5 fd 10 04 08 vmovupd ymm0, YMMWORD PTR [rax+rcx] 000f4 c5 fd 59 45 20 vmulpd ymm0, ymm0, YMMWORD PTR vec$[rbp] 000f9 c5 fd 11 85 00 01 00 00 vmovupd YMMWORD PTR c2$4[rbp], ymm0 ; 303 : register __m256d c3 = _mm256_mul_pd(right[i].f64_y[3], vec); 00101 48 69 45 58 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 00109 49 8b 8d 70 02 00 00 mov rcx, QWORD PTR right$[r13] 00110 48 03 c8 add rcx, rax 00113 48 8b c1 mov rax, rcx 00116 b9 20 00 00 00 mov ecx, 32 ; 00000020H 0011b 48 6b c9 03 imul rcx, rcx, 3 0011f c5 fd 10 04 08 vmovupd ymm0, YMMWORD PTR [rax+rcx] 00124 c5 fd 59 45 20 vmulpd ymm0, ymm0, YMMWORD PTR vec$[rbp] 00129 c5 fd 11 85 40 01 00 00 vmovupd YMMWORD PTR c3$5[rbp], ymm0 ; 304 : ; 305 : ans[i].f64_y[0] = c0; 00131 48 69 45 58 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 00139 49 8b 8d 78 02 00 00 mov rcx, QWORD PTR ans$[r13] 00140 48 03 c8 add rcx, rax 00143 48 8b c1 mov rax, rcx 00146 b9 20 00 00 00 mov ecx, 32 ; 00000020H 0014b 48 6b c9 00 imul rcx, rcx, 0 0014f c5 fd 10 85 80 00 00 00 vmovupd ymm0, YMMWORD PTR c0$2[rbp] 00157 c5 fd 11 04 08 vmovupd YMMWORD PTR [rax+rcx], ymm0 ; 306 : ans[i].f64_y[1] = c1; 0015c 48 69 45 58 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 00164 49 8b 8d 78 02 00 00 mov rcx, QWORD PTR ans$[r13] 0016b 48 03 c8 add rcx, rax 0016e 48 8b c1 mov rax, rcx 00171 b9 20 00 00 00 mov ecx, 32 ; 00000020H 00176 48 6b c9 01 imul rcx, rcx, 1 0017a c5 fd 10 85 c0 00 00 00 vmovupd ymm0, YMMWORD PTR c1$3[rbp] 00182 c5 fd 11 04 08 vmovupd YMMWORD PTR [rax+rcx], ymm0 ; 307 : ans[i].f64_y[2] = c2; 00187 48 69 45 58 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 0018f 49 8b 8d 78 02 00 00 mov rcx, QWORD PTR ans$[r13] 00196 48 03 c8 add rcx, rax 00199 48 8b c1 mov rax, rcx 0019c b9 20 00 00 00 mov ecx, 32 ; 00000020H 001a1 48 6b c9 02 imul rcx, rcx, 2 001a5 c5 fd 10 85 00 01 00 00 vmovupd ymm0, YMMWORD PTR c2$4[rbp] 001ad c5 fd 11 04 08 vmovupd YMMWORD PTR [rax+rcx], ymm0 ; 308 : ans[i].f64_y[3] = c3; 001b2 48 69 45 58 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 001ba 49 8b 8d 78 02 00 00 mov rcx, QWORD PTR ans$[r13] 001c1 48 03 c8 add rcx, rax 001c4 48 8b c1 mov rax, rcx 001c7 b9 20 00 00 00 mov ecx, 32 ; 00000020H 001cc 48 6b c9 03 imul rcx, rcx, 3 001d0 c5 fd 10 85 40 01 00 00 vmovupd ymm0, YMMWORD PTR c3$5[rbp] 001d8 c5 fd 11 04 08 vmovupd YMMWORD PTR [rax+rcx], ymm0 ; 309 : } 001dd e9 73 fe ff ff jmp $LN2@double_buf $LN3@double_buf: ; 310 : } 001e2 49 8d a5 50 02 00 00 lea rsp, QWORD PTR [r13+592] 001e9 5f pop rdi 001ea 5d pop rbp 001eb 41 5d pop r13 001ed c3 ret 0 double_buf_scalar_mul_avx ENDP _TEXT ENDS ; Function compile flags: /Odtp /RTCsu /ZI ; File D:\platform-dev\StgSharp.Native\sn-src\m.bufop.x86.c ; COMDAT double_buf_scalar_mul_sse _TEXT SEGMENT vec$ = 16 i$1 = 56 c0$2 = 96 c1$3 = 144 c2$4 = 192 c3$5 = 240 c4$6 = 288 c5$7 = 336 c6$8 = 384 c7$9 = 432 right$ = 688 ans$ = 696 scalar$ = 704 count$ = 712 double_buf_scalar_mul_sse PROC ; COMDAT ; 273 : { $LN6: 00000 4c 89 4c 24 20 mov QWORD PTR [rsp+32], r9 00005 4c 89 44 24 18 mov QWORD PTR [rsp+24], r8 0000a 48 89 54 24 10 mov QWORD PTR [rsp+16], rdx 0000f 48 89 4c 24 08 mov QWORD PTR [rsp+8], rcx 00014 55 push rbp 00015 57 push rdi 00016 48 81 ec b8 02 00 00 sub rsp, 696 ; 000002b8H 0001d 48 8d 6c 24 20 lea rbp, QWORD PTR [rsp+32] 00022 48 8d 0d 00 00 00 00 lea rcx, OFFSET FLAT:__BAFF6ACF_m@bufop@x86@c 00029 e8 00 00 00 00 call __CheckForDebuggerJustMyCode 0002e 90 npad 1 ; 274 : register __m128d vec = _mm_set1_pd(((double *)(scalar->data))[0]); 0002f b8 08 00 00 00 mov eax, 8 00034 48 6b c0 00 imul rax, rax, 0 00038 48 8b 8d c0 02 00 00 mov rcx, QWORD PTR scalar$[rbp] 0003f f2 0f 10 04 01 movsd xmm0, QWORD PTR [rcx+rax] 00044 66 0f 14 c0 unpcklpd xmm0, xmm0 00048 0f 29 45 10 movaps XMMWORD PTR vec$[rbp], xmm0 ; 275 : for (size_t i = 0; i < count; i++) { 0004c 48 c7 45 38 00 00 00 00 mov QWORD PTR i$1[rbp], 0 00054 eb 0b jmp SHORT $LN4@double_buf $LN2@double_buf: 00056 48 8b 45 38 mov rax, QWORD PTR i$1[rbp] 0005a 48 ff c0 inc rax 0005d 48 89 45 38 mov QWORD PTR i$1[rbp], rax $LN4@double_buf: 00061 48 8b 85 c8 02 00 00 mov rax, QWORD PTR count$[rbp] 00068 48 39 45 38 cmp QWORD PTR i$1[rbp], rax 0006c 0f 83 b7 02 00 00 jae $LN3@double_buf ; 276 : register __m128d c0 = _mm_mul_pd(right[i].f64_x[0], vec); 00072 48 69 45 38 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 0007a 48 8b 8d b0 02 00 00 mov rcx, QWORD PTR right$[rbp] 00081 48 03 c8 add rcx, rax 00084 48 8b c1 mov rax, rcx 00087 b9 10 00 00 00 mov ecx, 16 0008c 48 6b c9 00 imul rcx, rcx, 0 00090 0f 10 04 08 movups xmm0, XMMWORD PTR [rax+rcx] 00094 66 0f 59 45 10 mulpd xmm0, XMMWORD PTR vec$[rbp] 00099 0f 29 45 60 movaps XMMWORD PTR c0$2[rbp], xmm0 ; 277 : register __m128d c1 = _mm_mul_pd(right[i].f64_x[1], vec); 0009d 48 69 45 38 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 000a5 48 8b 8d b0 02 00 00 mov rcx, QWORD PTR right$[rbp] 000ac 48 03 c8 add rcx, rax 000af 48 8b c1 mov rax, rcx 000b2 b9 10 00 00 00 mov ecx, 16 000b7 48 6b c9 01 imul rcx, rcx, 1 000bb 0f 10 04 08 movups xmm0, XMMWORD PTR [rax+rcx] 000bf 66 0f 59 45 10 mulpd xmm0, XMMWORD PTR vec$[rbp] 000c4 0f 29 85 90 00 00 00 movaps XMMWORD PTR c1$3[rbp], xmm0 ; 278 : register __m128d c2 = _mm_mul_pd(right[i].f64_x[2], vec); 000cb 48 69 45 38 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 000d3 48 8b 8d b0 02 00 00 mov rcx, QWORD PTR right$[rbp] 000da 48 03 c8 add rcx, rax 000dd 48 8b c1 mov rax, rcx 000e0 b9 10 00 00 00 mov ecx, 16 000e5 48 6b c9 02 imul rcx, rcx, 2 000e9 0f 10 04 08 movups xmm0, XMMWORD PTR [rax+rcx] 000ed 66 0f 59 45 10 mulpd xmm0, XMMWORD PTR vec$[rbp] 000f2 0f 29 85 c0 00 00 00 movaps XMMWORD PTR c2$4[rbp], xmm0 ; 279 : register __m128d c3 = _mm_mul_pd(right[i].f64_x[3], vec); 000f9 48 69 45 38 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 00101 48 8b 8d b0 02 00 00 mov rcx, QWORD PTR right$[rbp] 00108 48 03 c8 add rcx, rax 0010b 48 8b c1 mov rax, rcx 0010e b9 10 00 00 00 mov ecx, 16 00113 48 6b c9 03 imul rcx, rcx, 3 00117 0f 10 04 08 movups xmm0, XMMWORD PTR [rax+rcx] 0011b 66 0f 59 45 10 mulpd xmm0, XMMWORD PTR vec$[rbp] 00120 0f 29 85 f0 00 00 00 movaps XMMWORD PTR c3$5[rbp], xmm0 ; 280 : register __m128d c4 = _mm_mul_pd(right[i].f64_x[4], vec); 00127 48 69 45 38 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 0012f 48 8b 8d b0 02 00 00 mov rcx, QWORD PTR right$[rbp] 00136 48 03 c8 add rcx, rax 00139 48 8b c1 mov rax, rcx 0013c b9 10 00 00 00 mov ecx, 16 00141 48 6b c9 04 imul rcx, rcx, 4 00145 0f 10 04 08 movups xmm0, XMMWORD PTR [rax+rcx] 00149 66 0f 59 45 10 mulpd xmm0, XMMWORD PTR vec$[rbp] 0014e 0f 29 85 20 01 00 00 movaps XMMWORD PTR c4$6[rbp], xmm0 ; 281 : register __m128d c5 = _mm_mul_pd(right[i].f64_x[5], vec); 00155 48 69 45 38 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 0015d 48 8b 8d b0 02 00 00 mov rcx, QWORD PTR right$[rbp] 00164 48 03 c8 add rcx, rax 00167 48 8b c1 mov rax, rcx 0016a b9 10 00 00 00 mov ecx, 16 0016f 48 6b c9 05 imul rcx, rcx, 5 00173 0f 10 04 08 movups xmm0, XMMWORD PTR [rax+rcx] 00177 66 0f 59 45 10 mulpd xmm0, XMMWORD PTR vec$[rbp] 0017c 0f 29 85 50 01 00 00 movaps XMMWORD PTR c5$7[rbp], xmm0 ; 282 : register __m128d c6 = _mm_mul_pd(right[i].f64_x[6], vec); 00183 48 69 45 38 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 0018b 48 8b 8d b0 02 00 00 mov rcx, QWORD PTR right$[rbp] 00192 48 03 c8 add rcx, rax 00195 48 8b c1 mov rax, rcx 00198 b9 10 00 00 00 mov ecx, 16 0019d 48 6b c9 06 imul rcx, rcx, 6 001a1 0f 10 04 08 movups xmm0, XMMWORD PTR [rax+rcx] 001a5 66 0f 59 45 10 mulpd xmm0, XMMWORD PTR vec$[rbp] 001aa 0f 29 85 80 01 00 00 movaps XMMWORD PTR c6$8[rbp], xmm0 ; 283 : register __m128d c7 = _mm_mul_pd(right[i].f64_x[7], vec); 001b1 48 69 45 38 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 001b9 48 8b 8d b0 02 00 00 mov rcx, QWORD PTR right$[rbp] 001c0 48 03 c8 add rcx, rax 001c3 48 8b c1 mov rax, rcx 001c6 b9 10 00 00 00 mov ecx, 16 001cb 48 6b c9 07 imul rcx, rcx, 7 001cf 0f 10 04 08 movups xmm0, XMMWORD PTR [rax+rcx] 001d3 66 0f 59 45 10 mulpd xmm0, XMMWORD PTR vec$[rbp] 001d8 0f 29 85 b0 01 00 00 movaps XMMWORD PTR c7$9[rbp], xmm0 ; 284 : ; 285 : ans[i].f64_x[0] = c0; 001df 48 69 45 38 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 001e7 48 8b 8d b8 02 00 00 mov rcx, QWORD PTR ans$[rbp] 001ee 48 03 c8 add rcx, rax 001f1 48 8b c1 mov rax, rcx 001f4 b9 10 00 00 00 mov ecx, 16 001f9 48 6b c9 00 imul rcx, rcx, 0 001fd 0f 28 45 60 movaps xmm0, XMMWORD PTR c0$2[rbp] 00201 0f 11 04 08 movups XMMWORD PTR [rax+rcx], xmm0 ; 286 : ans[i].f64_x[1] = c1; 00205 48 69 45 38 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 0020d 48 8b 8d b8 02 00 00 mov rcx, QWORD PTR ans$[rbp] 00214 48 03 c8 add rcx, rax 00217 48 8b c1 mov rax, rcx 0021a b9 10 00 00 00 mov ecx, 16 0021f 48 6b c9 01 imul rcx, rcx, 1 00223 0f 28 85 90 00 00 00 movaps xmm0, XMMWORD PTR c1$3[rbp] 0022a 0f 11 04 08 movups XMMWORD PTR [rax+rcx], xmm0 ; 287 : ans[i].f64_x[2] = c2; 0022e 48 69 45 38 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 00236 48 8b 8d b8 02 00 00 mov rcx, QWORD PTR ans$[rbp] 0023d 48 03 c8 add rcx, rax 00240 48 8b c1 mov rax, rcx 00243 b9 10 00 00 00 mov ecx, 16 00248 48 6b c9 02 imul rcx, rcx, 2 0024c 0f 28 85 c0 00 00 00 movaps xmm0, XMMWORD PTR c2$4[rbp] 00253 0f 11 04 08 movups XMMWORD PTR [rax+rcx], xmm0 ; 288 : ans[i].f64_x[3] = c3; 00257 48 69 45 38 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 0025f 48 8b 8d b8 02 00 00 mov rcx, QWORD PTR ans$[rbp] 00266 48 03 c8 add rcx, rax 00269 48 8b c1 mov rax, rcx 0026c b9 10 00 00 00 mov ecx, 16 00271 48 6b c9 03 imul rcx, rcx, 3 00275 0f 28 85 f0 00 00 00 movaps xmm0, XMMWORD PTR c3$5[rbp] 0027c 0f 11 04 08 movups XMMWORD PTR [rax+rcx], xmm0 ; 289 : ans[i].f64_x[4] = c4; 00280 48 69 45 38 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 00288 48 8b 8d b8 02 00 00 mov rcx, QWORD PTR ans$[rbp] 0028f 48 03 c8 add rcx, rax 00292 48 8b c1 mov rax, rcx 00295 b9 10 00 00 00 mov ecx, 16 0029a 48 6b c9 04 imul rcx, rcx, 4 0029e 0f 28 85 20 01 00 00 movaps xmm0, XMMWORD PTR c4$6[rbp] 002a5 0f 11 04 08 movups XMMWORD PTR [rax+rcx], xmm0 ; 290 : ans[i].f64_x[5] = c5; 002a9 48 69 45 38 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 002b1 48 8b 8d b8 02 00 00 mov rcx, QWORD PTR ans$[rbp] 002b8 48 03 c8 add rcx, rax 002bb 48 8b c1 mov rax, rcx 002be b9 10 00 00 00 mov ecx, 16 002c3 48 6b c9 05 imul rcx, rcx, 5 002c7 0f 28 85 50 01 00 00 movaps xmm0, XMMWORD PTR c5$7[rbp] 002ce 0f 11 04 08 movups XMMWORD PTR [rax+rcx], xmm0 ; 291 : ans[i].f64_x[6] = c6; 002d2 48 69 45 38 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 002da 48 8b 8d b8 02 00 00 mov rcx, QWORD PTR ans$[rbp] 002e1 48 03 c8 add rcx, rax 002e4 48 8b c1 mov rax, rcx 002e7 b9 10 00 00 00 mov ecx, 16 002ec 48 6b c9 06 imul rcx, rcx, 6 002f0 0f 28 85 80 01 00 00 movaps xmm0, XMMWORD PTR c6$8[rbp] 002f7 0f 11 04 08 movups XMMWORD PTR [rax+rcx], xmm0 ; 292 : ans[i].f64_x[7] = c7; 002fb 48 69 45 38 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 00303 48 8b 8d b8 02 00 00 mov rcx, QWORD PTR ans$[rbp] 0030a 48 03 c8 add rcx, rax 0030d 48 8b c1 mov rax, rcx 00310 b9 10 00 00 00 mov ecx, 16 00315 48 6b c9 07 imul rcx, rcx, 7 00319 0f 28 85 b0 01 00 00 movaps xmm0, XMMWORD PTR c7$9[rbp] 00320 0f 11 04 08 movups XMMWORD PTR [rax+rcx], xmm0 ; 293 : } 00324 e9 2d fd ff ff jmp $LN2@double_buf $LN3@double_buf: ; 294 : } 00329 48 8d a5 98 02 00 00 lea rsp, QWORD PTR [rbp+664] 00330 5f pop rdi 00331 5d pop rbp 00332 c3 ret 0 double_buf_scalar_mul_sse ENDP _TEXT ENDS ; Function compile flags: /Odtp /RTCsu /ZI ; File D:\platform-dev\StgSharp.Native\sn-src\m.bufop.x86.c ; COMDAT float_buf_scalar_mul_512 _TEXT SEGMENT vec$ = 64 i$1 = 152 c0$2 = 192 right$ = 560 ans$ = 568 scalar$ = 576 count$ = 584 float_buf_scalar_mul_512 PROC ; COMDAT ; 263 : { $LN6: 00000 4c 89 4c 24 20 mov QWORD PTR [rsp+32], r9 00005 4c 89 44 24 18 mov QWORD PTR [rsp+24], r8 0000a 48 89 54 24 10 mov QWORD PTR [rsp+16], rdx 0000f 48 89 4c 24 08 mov QWORD PTR [rsp+8], rcx 00014 41 55 push r13 00016 55 push rbp 00017 57 push rdi 00018 48 81 ec 30 02 00 00 sub rsp, 560 ; 00000230H 0001f 4c 8d 6c 24 20 lea r13, QWORD PTR [rsp+32] 00024 48 8d 6c 24 60 lea rbp, QWORD PTR [rsp+96] 00029 48 83 e5 c0 and rbp, -64 ; ffffffffffffffc0H 0002d 48 8d 0d 00 00 00 00 lea rcx, OFFSET FLAT:__BAFF6ACF_m@bufop@x86@c 00034 e8 00 00 00 00 call __CheckForDebuggerJustMyCode 00039 90 npad 1 ; 264 : register __m512 vec = _mm512_broadcastss_ps(((__m128 *)(scalar->data))[0]); 0003a b8 10 00 00 00 mov eax, 16 0003f 48 6b c0 00 imul rax, rax, 0 00043 49 8b 8d 40 02 00 00 mov rcx, QWORD PTR scalar$[r13] 0004a 62 f2 7d 48 18 04 01 vbroadcastss zmm0, XMMWORD PTR [rcx+rax] 00051 62 f1 7c 48 11 45 01 vmovups ZMMWORD PTR vec$[rbp], zmm0 ; 265 : for (size_t i = 0; i < count; i++) { 00058 48 c7 85 98 00 00 00 00 00 00 00 mov QWORD PTR i$1[rbp], 0 00063 eb 11 jmp SHORT $LN4@float_buf_ $LN2@float_buf_: 00065 48 8b 85 98 00 00 00 mov rax, QWORD PTR i$1[rbp] 0006c 48 ff c0 inc rax 0006f 48 89 85 98 00 00 00 mov QWORD PTR i$1[rbp], rax $LN4@float_buf_: 00076 49 8b 85 48 02 00 00 mov rax, QWORD PTR count$[r13] 0007d 48 39 85 98 00 00 00 cmp QWORD PTR i$1[rbp], rax 00084 73 64 jae SHORT $LN3@float_buf_ ; 266 : register __m512 c0 = _mm512_mul_ps(right[i].f32_z[0], vec); 00086 48 6b 85 98 00 00 00 40 imul rax, QWORD PTR i$1[rbp], 64 ; 00000040H 0008e 49 8b 8d 30 02 00 00 mov rcx, QWORD PTR right$[r13] 00095 48 03 c8 add rcx, rax 00098 48 8b c1 mov rax, rcx 0009b b9 40 00 00 00 mov ecx, 64 ; 00000040H 000a0 48 6b c9 00 imul rcx, rcx, 0 000a4 62 f1 7c 48 10 04 08 vmovups zmm0, ZMMWORD PTR [rax+rcx] 000ab 62 f1 7c 48 59 45 01 vmulps zmm0, zmm0, ZMMWORD PTR vec$[rbp] 000b2 62 f1 7c 48 11 45 03 vmovups ZMMWORD PTR c0$2[rbp], zmm0 ; 267 : ; 268 : ans[i].f32_z[0] = c0; 000b9 48 6b 85 98 00 00 00 40 imul rax, QWORD PTR i$1[rbp], 64 ; 00000040H 000c1 49 8b 8d 38 02 00 00 mov rcx, QWORD PTR ans$[r13] 000c8 48 03 c8 add rcx, rax 000cb 48 8b c1 mov rax, rcx 000ce b9 40 00 00 00 mov ecx, 64 ; 00000040H 000d3 48 6b c9 00 imul rcx, rcx, 0 000d7 62 f1 7c 48 10 45 03 vmovups zmm0, ZMMWORD PTR c0$2[rbp] 000de 62 f1 7c 48 11 04 08 vmovups ZMMWORD PTR [rax+rcx], zmm0 ; 269 : } 000e5 e9 7b ff ff ff jmp $LN2@float_buf_ $LN3@float_buf_: ; 270 : } 000ea 49 8d a5 10 02 00 00 lea rsp, QWORD PTR [r13+528] 000f1 5f pop rdi 000f2 5d pop rbp 000f3 41 5d pop r13 000f5 c3 ret 0 float_buf_scalar_mul_512 ENDP _TEXT ENDS ; Function compile flags: /Odtp /RTCsu /ZI ; File D:\platform-dev\StgSharp.Native\sn-src\m.bufop.x86.c ; COMDAT float_buf_scalar_mul_avx _TEXT SEGMENT vec$ = 32 i$1 = 88 c0$2 = 128 c1$3 = 192 right$ = 496 ans$ = 504 scalar$ = 512 count$ = 520 float_buf_scalar_mul_avx PROC ; COMDAT ; 251 : { $LN6: 00000 4c 89 4c 24 20 mov QWORD PTR [rsp+32], r9 00005 4c 89 44 24 18 mov QWORD PTR [rsp+24], r8 0000a 48 89 54 24 10 mov QWORD PTR [rsp+16], rdx 0000f 48 89 4c 24 08 mov QWORD PTR [rsp+8], rcx 00014 41 55 push r13 00016 55 push rbp 00017 57 push rdi 00018 48 81 ec f0 01 00 00 sub rsp, 496 ; 000001f0H 0001f 4c 8d 6c 24 20 lea r13, QWORD PTR [rsp+32] 00024 48 8d 6c 24 40 lea rbp, QWORD PTR [rsp+64] 00029 48 83 e5 e0 and rbp, -32 ; ffffffffffffffe0H 0002d 48 8d 0d 00 00 00 00 lea rcx, OFFSET FLAT:__BAFF6ACF_m@bufop@x86@c 00034 e8 00 00 00 00 call __CheckForDebuggerJustMyCode 00039 90 npad 1 ; 252 : register __m256 vec = _mm256_broadcast_ss(((float *)(scalar->data))); 0003a 49 8b 85 00 02 00 00 mov rax, QWORD PTR scalar$[r13] 00041 c4 e2 7d 18 00 vbroadcastss ymm0, DWORD PTR [rax] 00046 c5 fc 11 45 20 vmovups YMMWORD PTR vec$[rbp], ymm0 ; 253 : for (size_t i = 0; i < count; i++) { 0004b 48 c7 45 58 00 00 00 00 mov QWORD PTR i$1[rbp], 0 00053 eb 0b jmp SHORT $LN4@float_buf_ $LN2@float_buf_: 00055 48 8b 45 58 mov rax, QWORD PTR i$1[rbp] 00059 48 ff c0 inc rax 0005c 48 89 45 58 mov QWORD PTR i$1[rbp], rax $LN4@float_buf_: 00060 49 8b 85 08 02 00 00 mov rax, QWORD PTR count$[r13] 00067 48 39 45 58 cmp QWORD PTR i$1[rbp], rax 0006b 0f 83 af 00 00 00 jae $LN3@float_buf_ ; 254 : register __m256 c0 = _mm256_mul_ps(right[i].f32_y[0], vec); 00071 48 6b 45 58 40 imul rax, QWORD PTR i$1[rbp], 64 ; 00000040H 00076 49 8b 8d f0 01 00 00 mov rcx, QWORD PTR right$[r13] 0007d 48 03 c8 add rcx, rax 00080 48 8b c1 mov rax, rcx 00083 b9 20 00 00 00 mov ecx, 32 ; 00000020H 00088 48 6b c9 00 imul rcx, rcx, 0 0008c c5 fc 10 04 08 vmovups ymm0, YMMWORD PTR [rax+rcx] 00091 c5 fc 59 45 20 vmulps ymm0, ymm0, YMMWORD PTR vec$[rbp] 00096 c5 fc 11 85 80 00 00 00 vmovups YMMWORD PTR c0$2[rbp], ymm0 ; 255 : register __m256 c1 = _mm256_mul_ps(right[i].f32_y[1], vec); 0009e 48 6b 45 58 40 imul rax, QWORD PTR i$1[rbp], 64 ; 00000040H 000a3 49 8b 8d f0 01 00 00 mov rcx, QWORD PTR right$[r13] 000aa 48 03 c8 add rcx, rax 000ad 48 8b c1 mov rax, rcx 000b0 b9 20 00 00 00 mov ecx, 32 ; 00000020H 000b5 48 6b c9 01 imul rcx, rcx, 1 000b9 c5 fc 10 04 08 vmovups ymm0, YMMWORD PTR [rax+rcx] 000be c5 fc 59 45 20 vmulps ymm0, ymm0, YMMWORD PTR vec$[rbp] 000c3 c5 fc 11 85 c0 00 00 00 vmovups YMMWORD PTR c1$3[rbp], ymm0 ; 256 : ; 257 : ans[i].f32_y[0] = c0; 000cb 48 6b 45 58 40 imul rax, QWORD PTR i$1[rbp], 64 ; 00000040H 000d0 49 8b 8d f8 01 00 00 mov rcx, QWORD PTR ans$[r13] 000d7 48 03 c8 add rcx, rax 000da 48 8b c1 mov rax, rcx 000dd b9 20 00 00 00 mov ecx, 32 ; 00000020H 000e2 48 6b c9 00 imul rcx, rcx, 0 000e6 c5 fc 10 85 80 00 00 00 vmovups ymm0, YMMWORD PTR c0$2[rbp] 000ee c5 fc 11 04 08 vmovups YMMWORD PTR [rax+rcx], ymm0 ; 258 : ans[i].f32_y[1] = c1; 000f3 48 6b 45 58 40 imul rax, QWORD PTR i$1[rbp], 64 ; 00000040H 000f8 49 8b 8d f8 01 00 00 mov rcx, QWORD PTR ans$[r13] 000ff 48 03 c8 add rcx, rax 00102 48 8b c1 mov rax, rcx 00105 b9 20 00 00 00 mov ecx, 32 ; 00000020H 0010a 48 6b c9 01 imul rcx, rcx, 1 0010e c5 fc 10 85 c0 00 00 00 vmovups ymm0, YMMWORD PTR c1$3[rbp] 00116 c5 fc 11 04 08 vmovups YMMWORD PTR [rax+rcx], ymm0 ; 259 : } 0011b e9 35 ff ff ff jmp $LN2@float_buf_ $LN3@float_buf_: ; 260 : } 00120 49 8d a5 d0 01 00 00 lea rsp, QWORD PTR [r13+464] 00127 5f pop rdi 00128 5d pop rbp 00129 41 5d pop r13 0012b c3 ret 0 float_buf_scalar_mul_avx ENDP _TEXT ENDS ; Function compile flags: /Odtp /RTCsu /ZI ; File D:\platform-dev\StgSharp.Native\sn-src\m.bufop.x86.c ; COMDAT float_buf_scalar_mul_sse _TEXT SEGMENT vec$ = 16 i$1 = 56 c0$2 = 96 c1$3 = 144 c2$4 = 192 c3$5 = 240 right$ = 496 ans$ = 504 scalar$ = 512 count$ = 520 float_buf_scalar_mul_sse PROC ; COMDAT ; 235 : { $LN6: 00000 4c 89 4c 24 20 mov QWORD PTR [rsp+32], r9 00005 4c 89 44 24 18 mov QWORD PTR [rsp+24], r8 0000a 48 89 54 24 10 mov QWORD PTR [rsp+16], rdx 0000f 48 89 4c 24 08 mov QWORD PTR [rsp+8], rcx 00014 55 push rbp 00015 57 push rdi 00016 48 81 ec f8 01 00 00 sub rsp, 504 ; 000001f8H 0001d 48 8d 6c 24 20 lea rbp, QWORD PTR [rsp+32] 00022 48 8d 0d 00 00 00 00 lea rcx, OFFSET FLAT:__BAFF6ACF_m@bufop@x86@c 00029 e8 00 00 00 00 call __CheckForDebuggerJustMyCode 0002e 90 npad 1 ; 236 : register __m128 vec = _mm_set_ps1(((float *)(scalar->data))[0]); 0002f b8 04 00 00 00 mov eax, 4 00034 48 6b c0 00 imul rax, rax, 0 00038 48 8b 8d 00 02 00 00 mov rcx, QWORD PTR scalar$[rbp] 0003f f3 0f 10 04 01 movss xmm0, DWORD PTR [rcx+rax] 00044 0f c6 c0 00 shufps xmm0, xmm0, 0 00048 0f 29 45 10 movaps XMMWORD PTR vec$[rbp], xmm0 ; 237 : for (size_t i = 0; i < count; i++) { 0004c 48 c7 45 38 00 00 00 00 mov QWORD PTR i$1[rbp], 0 00054 eb 0b jmp SHORT $LN4@float_buf_ $LN2@float_buf_: 00056 48 8b 45 38 mov rax, QWORD PTR i$1[rbp] 0005a 48 ff c0 inc rax 0005d 48 89 45 38 mov QWORD PTR i$1[rbp], rax $LN4@float_buf_: 00061 48 8b 85 08 02 00 00 mov rax, QWORD PTR count$[rbp] 00068 48 39 45 38 cmp QWORD PTR i$1[rbp], rax 0006c 0f 83 3f 01 00 00 jae $LN3@float_buf_ ; 238 : register __m128 c0 = _mm_mul_ps(right[i].f32_x[0], vec); 00072 48 6b 45 38 40 imul rax, QWORD PTR i$1[rbp], 64 ; 00000040H 00077 48 8b 8d f0 01 00 00 mov rcx, QWORD PTR right$[rbp] 0007e 48 03 c8 add rcx, rax 00081 48 8b c1 mov rax, rcx 00084 b9 10 00 00 00 mov ecx, 16 00089 48 6b c9 00 imul rcx, rcx, 0 0008d 0f 10 04 08 movups xmm0, XMMWORD PTR [rax+rcx] 00091 0f 59 45 10 mulps xmm0, XMMWORD PTR vec$[rbp] 00095 0f 29 45 60 movaps XMMWORD PTR c0$2[rbp], xmm0 ; 239 : register __m128 c1 = _mm_mul_ps(right[i].f32_x[1], vec); 00099 48 6b 45 38 40 imul rax, QWORD PTR i$1[rbp], 64 ; 00000040H 0009e 48 8b 8d f0 01 00 00 mov rcx, QWORD PTR right$[rbp] 000a5 48 03 c8 add rcx, rax 000a8 48 8b c1 mov rax, rcx 000ab b9 10 00 00 00 mov ecx, 16 000b0 48 6b c9 01 imul rcx, rcx, 1 000b4 0f 10 04 08 movups xmm0, XMMWORD PTR [rax+rcx] 000b8 0f 59 45 10 mulps xmm0, XMMWORD PTR vec$[rbp] 000bc 0f 29 85 90 00 00 00 movaps XMMWORD PTR c1$3[rbp], xmm0 ; 240 : register __m128 c2 = _mm_mul_ps(right[i].f32_x[2], vec); 000c3 48 6b 45 38 40 imul rax, QWORD PTR i$1[rbp], 64 ; 00000040H 000c8 48 8b 8d f0 01 00 00 mov rcx, QWORD PTR right$[rbp] 000cf 48 03 c8 add rcx, rax 000d2 48 8b c1 mov rax, rcx 000d5 b9 10 00 00 00 mov ecx, 16 000da 48 6b c9 02 imul rcx, rcx, 2 000de 0f 10 04 08 movups xmm0, XMMWORD PTR [rax+rcx] 000e2 0f 59 45 10 mulps xmm0, XMMWORD PTR vec$[rbp] 000e6 0f 29 85 c0 00 00 00 movaps XMMWORD PTR c2$4[rbp], xmm0 ; 241 : register __m128 c3 = _mm_mul_ps(right[i].f32_x[3], vec); 000ed 48 6b 45 38 40 imul rax, QWORD PTR i$1[rbp], 64 ; 00000040H 000f2 48 8b 8d f0 01 00 00 mov rcx, QWORD PTR right$[rbp] 000f9 48 03 c8 add rcx, rax 000fc 48 8b c1 mov rax, rcx 000ff b9 10 00 00 00 mov ecx, 16 00104 48 6b c9 03 imul rcx, rcx, 3 00108 0f 10 04 08 movups xmm0, XMMWORD PTR [rax+rcx] 0010c 0f 59 45 10 mulps xmm0, XMMWORD PTR vec$[rbp] 00110 0f 29 85 f0 00 00 00 movaps XMMWORD PTR c3$5[rbp], xmm0 ; 242 : ; 243 : ans[i].f32_x[0] = c0; 00117 48 6b 45 38 40 imul rax, QWORD PTR i$1[rbp], 64 ; 00000040H 0011c 48 8b 8d f8 01 00 00 mov rcx, QWORD PTR ans$[rbp] 00123 48 03 c8 add rcx, rax 00126 48 8b c1 mov rax, rcx 00129 b9 10 00 00 00 mov ecx, 16 0012e 48 6b c9 00 imul rcx, rcx, 0 00132 0f 28 45 60 movaps xmm0, XMMWORD PTR c0$2[rbp] 00136 0f 11 04 08 movups XMMWORD PTR [rax+rcx], xmm0 ; 244 : ans[i].f32_x[1] = c1; 0013a 48 6b 45 38 40 imul rax, QWORD PTR i$1[rbp], 64 ; 00000040H 0013f 48 8b 8d f8 01 00 00 mov rcx, QWORD PTR ans$[rbp] 00146 48 03 c8 add rcx, rax 00149 48 8b c1 mov rax, rcx 0014c b9 10 00 00 00 mov ecx, 16 00151 48 6b c9 01 imul rcx, rcx, 1 00155 0f 28 85 90 00 00 00 movaps xmm0, XMMWORD PTR c1$3[rbp] 0015c 0f 11 04 08 movups XMMWORD PTR [rax+rcx], xmm0 ; 245 : ans[i].f32_x[2] = c2; 00160 48 6b 45 38 40 imul rax, QWORD PTR i$1[rbp], 64 ; 00000040H 00165 48 8b 8d f8 01 00 00 mov rcx, QWORD PTR ans$[rbp] 0016c 48 03 c8 add rcx, rax 0016f 48 8b c1 mov rax, rcx 00172 b9 10 00 00 00 mov ecx, 16 00177 48 6b c9 02 imul rcx, rcx, 2 0017b 0f 28 85 c0 00 00 00 movaps xmm0, XMMWORD PTR c2$4[rbp] 00182 0f 11 04 08 movups XMMWORD PTR [rax+rcx], xmm0 ; 246 : ans[i].f32_x[3] = c3; 00186 48 6b 45 38 40 imul rax, QWORD PTR i$1[rbp], 64 ; 00000040H 0018b 48 8b 8d f8 01 00 00 mov rcx, QWORD PTR ans$[rbp] 00192 48 03 c8 add rcx, rax 00195 48 8b c1 mov rax, rcx 00198 b9 10 00 00 00 mov ecx, 16 0019d 48 6b c9 03 imul rcx, rcx, 3 001a1 0f 28 85 f0 00 00 00 movaps xmm0, XMMWORD PTR c3$5[rbp] 001a8 0f 11 04 08 movups XMMWORD PTR [rax+rcx], xmm0 ; 247 : } 001ac e9 a5 fe ff ff jmp $LN2@float_buf_ $LN3@float_buf_: ; 248 : } 001b1 48 8d a5 d8 01 00 00 lea rsp, QWORD PTR [rbp+472] 001b8 5f pop rdi 001b9 5d pop rbp 001ba c3 ret 0 float_buf_scalar_mul_sse ENDP _TEXT ENDS ; Function compile flags: /Odtp /RTCsu /ZI ; File D:\platform-dev\StgSharp.Native\sn-src\m.bufop.x86.c ; COMDAT double_buf_sub_512 _TEXT SEGMENT i$1 = 8 c0$2 = 64 left$ = 432 right$ = 440 ans$ = 448 count$ = 456 double_buf_sub_512 PROC ; COMDAT ; 227 : { $LN6: 00000 4c 89 4c 24 20 mov QWORD PTR [rsp+32], r9 00005 4c 89 44 24 18 mov QWORD PTR [rsp+24], r8 0000a 48 89 54 24 10 mov QWORD PTR [rsp+16], rdx 0000f 48 89 4c 24 08 mov QWORD PTR [rsp+8], rcx 00014 41 55 push r13 00016 55 push rbp 00017 57 push rdi 00018 48 81 ec b0 01 00 00 sub rsp, 432 ; 000001b0H 0001f 4c 8d 6c 24 20 lea r13, QWORD PTR [rsp+32] 00024 48 8d 6c 24 60 lea rbp, QWORD PTR [rsp+96] 00029 48 83 e5 c0 and rbp, -64 ; ffffffffffffffc0H 0002d 48 8d 0d 00 00 00 00 lea rcx, OFFSET FLAT:__BAFF6ACF_m@bufop@x86@c 00034 e8 00 00 00 00 call __CheckForDebuggerJustMyCode 00039 90 npad 1 ; 228 : for (size_t i = 0; i < count; i++) { 0003a 48 c7 45 08 00 00 00 00 mov QWORD PTR i$1[rbp], 0 00042 eb 0b jmp SHORT $LN4@double_buf $LN2@double_buf: 00044 48 8b 45 08 mov rax, QWORD PTR i$1[rbp] 00048 48 ff c0 inc rax 0004b 48 89 45 08 mov QWORD PTR i$1[rbp], rax $LN4@double_buf: 0004f 49 8b 85 c8 01 00 00 mov rax, QWORD PTR count$[r13] 00056 48 39 45 08 cmp QWORD PTR i$1[rbp], rax 0005a 0f 83 83 00 00 00 jae $LN3@double_buf ; 229 : register __m512 c0 = _mm512_sub_ps(left[i].f32_z[0], right[i].f32_z[0]); 00060 48 69 45 08 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 00068 49 8b 8d b8 01 00 00 mov rcx, QWORD PTR right$[r13] 0006f 48 03 c8 add rcx, rax 00072 48 8b c1 mov rax, rcx 00075 b9 40 00 00 00 mov ecx, 64 ; 00000040H 0007a 48 6b c9 00 imul rcx, rcx, 0 0007e 48 69 55 08 80 00 00 00 imul rdx, QWORD PTR i$1[rbp], 128 ; 00000080H 00086 4d 8b 85 b0 01 00 00 mov r8, QWORD PTR left$[r13] 0008d 4c 03 c2 add r8, rdx 00090 49 8b d0 mov rdx, r8 00093 41 b8 40 00 00 00 mov r8d, 64 ; 00000040H 00099 4d 6b c0 00 imul r8, r8, 0 0009d 62 b1 7c 48 10 04 02 vmovups zmm0, ZMMWORD PTR [rdx+r8] 000a4 62 f1 7c 48 5c 04 08 vsubps zmm0, zmm0, ZMMWORD PTR [rax+rcx] 000ab 62 f1 7c 48 11 45 01 vmovups ZMMWORD PTR c0$2[rbp], zmm0 ; 230 : ans[i].f32_z[0] = c0; 000b2 48 69 45 08 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 000ba 49 8b 8d c0 01 00 00 mov rcx, QWORD PTR ans$[r13] 000c1 48 03 c8 add rcx, rax 000c4 48 8b c1 mov rax, rcx 000c7 b9 40 00 00 00 mov ecx, 64 ; 00000040H 000cc 48 6b c9 00 imul rcx, rcx, 0 000d0 62 f1 7c 48 10 45 01 vmovups zmm0, ZMMWORD PTR c0$2[rbp] 000d7 62 f1 7c 48 11 04 08 vmovups ZMMWORD PTR [rax+rcx], zmm0 ; 231 : } 000de e9 61 ff ff ff jmp $LN2@double_buf $LN3@double_buf: ; 232 : } 000e3 49 8d a5 90 01 00 00 lea rsp, QWORD PTR [r13+400] 000ea 5f pop rdi 000eb 5d pop rbp 000ec 41 5d pop r13 000ee c3 ret 0 double_buf_sub_512 ENDP _TEXT ENDS ; Function compile flags: /Odtp /RTCsu /ZI ; File D:\platform-dev\StgSharp.Native\sn-src\m.bufop.x86.c ; COMDAT double_buf_sub_avx _TEXT SEGMENT i$1 = 8 c0$2 = 64 c1$3 = 128 left$ = 432 right$ = 440 ans$ = 448 count$ = 456 double_buf_sub_avx PROC ; COMDAT ; 217 : { $LN6: 00000 4c 89 4c 24 20 mov QWORD PTR [rsp+32], r9 00005 4c 89 44 24 18 mov QWORD PTR [rsp+24], r8 0000a 48 89 54 24 10 mov QWORD PTR [rsp+16], rdx 0000f 48 89 4c 24 08 mov QWORD PTR [rsp+8], rcx 00014 41 55 push r13 00016 55 push rbp 00017 57 push rdi 00018 48 81 ec b0 01 00 00 sub rsp, 432 ; 000001b0H 0001f 4c 8d 6c 24 20 lea r13, QWORD PTR [rsp+32] 00024 48 8d 6c 24 40 lea rbp, QWORD PTR [rsp+64] 00029 48 83 e5 e0 and rbp, -32 ; ffffffffffffffe0H 0002d 48 8d 0d 00 00 00 00 lea rcx, OFFSET FLAT:__BAFF6ACF_m@bufop@x86@c 00034 e8 00 00 00 00 call __CheckForDebuggerJustMyCode 00039 90 npad 1 ; 218 : for (size_t i = 0; i < count; i++) { 0003a 48 c7 45 08 00 00 00 00 mov QWORD PTR i$1[rbp], 0 00042 eb 0b jmp SHORT $LN4@double_buf $LN2@double_buf: 00044 48 8b 45 08 mov rax, QWORD PTR i$1[rbp] 00048 48 ff c0 inc rax 0004b 48 89 45 08 mov QWORD PTR i$1[rbp], rax $LN4@double_buf: 0004f 49 8b 85 c8 01 00 00 mov rax, QWORD PTR count$[r13] 00056 48 39 45 08 cmp QWORD PTR i$1[rbp], rax 0005a 0f 83 f5 00 00 00 jae $LN3@double_buf ; 219 : register __m256 c0 = _mm256_sub_ps(left[i].f32_y[0], right[i].f32_y[0]); 00060 48 69 45 08 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 00068 49 8b 8d b8 01 00 00 mov rcx, QWORD PTR right$[r13] 0006f 48 03 c8 add rcx, rax 00072 48 8b c1 mov rax, rcx 00075 b9 20 00 00 00 mov ecx, 32 ; 00000020H 0007a 48 6b c9 00 imul rcx, rcx, 0 0007e 48 69 55 08 80 00 00 00 imul rdx, QWORD PTR i$1[rbp], 128 ; 00000080H 00086 4d 8b 85 b0 01 00 00 mov r8, QWORD PTR left$[r13] 0008d 4c 03 c2 add r8, rdx 00090 49 8b d0 mov rdx, r8 00093 41 b8 20 00 00 00 mov r8d, 32 ; 00000020H 00099 4d 6b c0 00 imul r8, r8, 0 0009d c4 a1 7c 10 04 02 vmovups ymm0, YMMWORD PTR [rdx+r8] 000a3 c5 fc 5c 04 08 vsubps ymm0, ymm0, YMMWORD PTR [rax+rcx] 000a8 c5 fc 11 45 40 vmovups YMMWORD PTR c0$2[rbp], ymm0 ; 220 : register __m256 c1 = _mm256_sub_ps(left[i].f32_y[1], right[i].f32_y[1]); 000ad 48 69 45 08 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 000b5 49 8b 8d b8 01 00 00 mov rcx, QWORD PTR right$[r13] 000bc 48 03 c8 add rcx, rax 000bf 48 8b c1 mov rax, rcx 000c2 b9 20 00 00 00 mov ecx, 32 ; 00000020H 000c7 48 6b c9 01 imul rcx, rcx, 1 000cb 48 69 55 08 80 00 00 00 imul rdx, QWORD PTR i$1[rbp], 128 ; 00000080H 000d3 4d 8b 85 b0 01 00 00 mov r8, QWORD PTR left$[r13] 000da 4c 03 c2 add r8, rdx 000dd 49 8b d0 mov rdx, r8 000e0 41 b8 20 00 00 00 mov r8d, 32 ; 00000020H 000e6 4d 6b c0 01 imul r8, r8, 1 000ea c4 a1 7c 10 04 02 vmovups ymm0, YMMWORD PTR [rdx+r8] 000f0 c5 fc 5c 04 08 vsubps ymm0, ymm0, YMMWORD PTR [rax+rcx] 000f5 c5 fc 11 85 80 00 00 00 vmovups YMMWORD PTR c1$3[rbp], ymm0 ; 221 : ans[i].f32_y[0] = c0; 000fd 48 69 45 08 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 00105 49 8b 8d c0 01 00 00 mov rcx, QWORD PTR ans$[r13] 0010c 48 03 c8 add rcx, rax 0010f 48 8b c1 mov rax, rcx 00112 b9 20 00 00 00 mov ecx, 32 ; 00000020H 00117 48 6b c9 00 imul rcx, rcx, 0 0011b c5 fc 10 45 40 vmovups ymm0, YMMWORD PTR c0$2[rbp] 00120 c5 fc 11 04 08 vmovups YMMWORD PTR [rax+rcx], ymm0 ; 222 : ans[i].f32_y[1] = c1; 00125 48 69 45 08 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 0012d 49 8b 8d c0 01 00 00 mov rcx, QWORD PTR ans$[r13] 00134 48 03 c8 add rcx, rax 00137 48 8b c1 mov rax, rcx 0013a b9 20 00 00 00 mov ecx, 32 ; 00000020H 0013f 48 6b c9 01 imul rcx, rcx, 1 00143 c5 fc 10 85 80 00 00 00 vmovups ymm0, YMMWORD PTR c1$3[rbp] 0014b c5 fc 11 04 08 vmovups YMMWORD PTR [rax+rcx], ymm0 ; 223 : } 00150 e9 ef fe ff ff jmp $LN2@double_buf $LN3@double_buf: ; 224 : } 00155 49 8d a5 90 01 00 00 lea rsp, QWORD PTR [r13+400] 0015c 5f pop rdi 0015d 5d pop rbp 0015e 41 5d pop r13 00160 c3 ret 0 double_buf_sub_avx ENDP _TEXT ENDS ; Function compile flags: /Odtp /RTCsu /ZI ; File D:\platform-dev\StgSharp.Native\sn-src\m.bufop.x86.c ; COMDAT double_buf_sub_sse _TEXT SEGMENT i$1 = 8 c0$2 = 48 c1$3 = 96 c2$4 = 144 c3$5 = 192 c4$6 = 240 c5$7 = 288 c6$8 = 336 c7$9 = 384 left$ = 640 right$ = 648 ans$ = 656 count$ = 664 double_buf_sub_sse PROC ; COMDAT ; 194 : { $LN6: 00000 4c 89 4c 24 20 mov QWORD PTR [rsp+32], r9 00005 4c 89 44 24 18 mov QWORD PTR [rsp+24], r8 0000a 48 89 54 24 10 mov QWORD PTR [rsp+16], rdx 0000f 48 89 4c 24 08 mov QWORD PTR [rsp+8], rcx 00014 55 push rbp 00015 57 push rdi 00016 48 81 ec 88 02 00 00 sub rsp, 648 ; 00000288H 0001d 48 8d 6c 24 20 lea rbp, QWORD PTR [rsp+32] 00022 48 8d 0d 00 00 00 00 lea rcx, OFFSET FLAT:__BAFF6ACF_m@bufop@x86@c 00029 e8 00 00 00 00 call __CheckForDebuggerJustMyCode 0002e 90 npad 1 ; 195 : for (size_t i = 0; i < count; i++) { 0002f 48 c7 45 08 00 00 00 00 mov QWORD PTR i$1[rbp], 0 00037 eb 0b jmp SHORT $LN4@double_buf $LN2@double_buf: 00039 48 8b 45 08 mov rax, QWORD PTR i$1[rbp] 0003d 48 ff c0 inc rax 00040 48 89 45 08 mov QWORD PTR i$1[rbp], rax $LN4@double_buf: 00044 48 8b 85 98 02 00 00 mov rax, QWORD PTR count$[rbp] 0004b 48 39 45 08 cmp QWORD PTR i$1[rbp], rax 0004f 0f 83 b1 03 00 00 jae $LN3@double_buf ; 196 : register __m128d c0 = _mm_sub_pd(left[i].f64_x[0], right[i].f64_x[0]); 00055 48 69 45 08 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 0005d 48 8b 8d 88 02 00 00 mov rcx, QWORD PTR right$[rbp] 00064 48 03 c8 add rcx, rax 00067 48 8b c1 mov rax, rcx 0006a b9 10 00 00 00 mov ecx, 16 0006f 48 6b c9 00 imul rcx, rcx, 0 00073 48 69 55 08 80 00 00 00 imul rdx, QWORD PTR i$1[rbp], 128 ; 00000080H 0007b 4c 8b 85 80 02 00 00 mov r8, QWORD PTR left$[rbp] 00082 4c 03 c2 add r8, rdx 00085 49 8b d0 mov rdx, r8 00088 41 b8 10 00 00 00 mov r8d, 16 0008e 4d 6b c0 00 imul r8, r8, 0 00092 42 0f 10 04 02 movups xmm0, XMMWORD PTR [rdx+r8] 00097 66 0f 5c 04 08 subpd xmm0, XMMWORD PTR [rax+rcx] 0009c 0f 29 45 30 movaps XMMWORD PTR c0$2[rbp], xmm0 ; 197 : register __m128d c1 = _mm_sub_pd(left[i].f64_x[1], right[i].f64_x[1]); 000a0 48 69 45 08 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 000a8 48 8b 8d 88 02 00 00 mov rcx, QWORD PTR right$[rbp] 000af 48 03 c8 add rcx, rax 000b2 48 8b c1 mov rax, rcx 000b5 b9 10 00 00 00 mov ecx, 16 000ba 48 6b c9 01 imul rcx, rcx, 1 000be 48 69 55 08 80 00 00 00 imul rdx, QWORD PTR i$1[rbp], 128 ; 00000080H 000c6 4c 8b 85 80 02 00 00 mov r8, QWORD PTR left$[rbp] 000cd 4c 03 c2 add r8, rdx 000d0 49 8b d0 mov rdx, r8 000d3 41 b8 10 00 00 00 mov r8d, 16 000d9 4d 6b c0 01 imul r8, r8, 1 000dd 42 0f 10 04 02 movups xmm0, XMMWORD PTR [rdx+r8] 000e2 66 0f 5c 04 08 subpd xmm0, XMMWORD PTR [rax+rcx] 000e7 0f 29 45 60 movaps XMMWORD PTR c1$3[rbp], xmm0 ; 198 : register __m128d c2 = _mm_sub_pd(left[i].f64_x[2], right[i].f64_x[2]); 000eb 48 69 45 08 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 000f3 48 8b 8d 88 02 00 00 mov rcx, QWORD PTR right$[rbp] 000fa 48 03 c8 add rcx, rax 000fd 48 8b c1 mov rax, rcx 00100 b9 10 00 00 00 mov ecx, 16 00105 48 6b c9 02 imul rcx, rcx, 2 00109 48 69 55 08 80 00 00 00 imul rdx, QWORD PTR i$1[rbp], 128 ; 00000080H 00111 4c 8b 85 80 02 00 00 mov r8, QWORD PTR left$[rbp] 00118 4c 03 c2 add r8, rdx 0011b 49 8b d0 mov rdx, r8 0011e 41 b8 10 00 00 00 mov r8d, 16 00124 4d 6b c0 02 imul r8, r8, 2 00128 42 0f 10 04 02 movups xmm0, XMMWORD PTR [rdx+r8] 0012d 66 0f 5c 04 08 subpd xmm0, XMMWORD PTR [rax+rcx] 00132 0f 29 85 90 00 00 00 movaps XMMWORD PTR c2$4[rbp], xmm0 ; 199 : register __m128d c3 = _mm_sub_pd(left[i].f64_x[3], right[i].f64_x[3]); 00139 48 69 45 08 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 00141 48 8b 8d 88 02 00 00 mov rcx, QWORD PTR right$[rbp] 00148 48 03 c8 add rcx, rax 0014b 48 8b c1 mov rax, rcx 0014e b9 10 00 00 00 mov ecx, 16 00153 48 6b c9 03 imul rcx, rcx, 3 00157 48 69 55 08 80 00 00 00 imul rdx, QWORD PTR i$1[rbp], 128 ; 00000080H 0015f 4c 8b 85 80 02 00 00 mov r8, QWORD PTR left$[rbp] 00166 4c 03 c2 add r8, rdx 00169 49 8b d0 mov rdx, r8 0016c 41 b8 10 00 00 00 mov r8d, 16 00172 4d 6b c0 03 imul r8, r8, 3 00176 42 0f 10 04 02 movups xmm0, XMMWORD PTR [rdx+r8] 0017b 66 0f 5c 04 08 subpd xmm0, XMMWORD PTR [rax+rcx] 00180 0f 29 85 c0 00 00 00 movaps XMMWORD PTR c3$5[rbp], xmm0 ; 200 : register __m128d c4 = _mm_sub_pd(left[i].f64_x[4], right[i].f64_x[4]); 00187 48 69 45 08 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 0018f 48 8b 8d 88 02 00 00 mov rcx, QWORD PTR right$[rbp] 00196 48 03 c8 add rcx, rax 00199 48 8b c1 mov rax, rcx 0019c b9 10 00 00 00 mov ecx, 16 001a1 48 6b c9 04 imul rcx, rcx, 4 001a5 48 69 55 08 80 00 00 00 imul rdx, QWORD PTR i$1[rbp], 128 ; 00000080H 001ad 4c 8b 85 80 02 00 00 mov r8, QWORD PTR left$[rbp] 001b4 4c 03 c2 add r8, rdx 001b7 49 8b d0 mov rdx, r8 001ba 41 b8 10 00 00 00 mov r8d, 16 001c0 4d 6b c0 04 imul r8, r8, 4 001c4 42 0f 10 04 02 movups xmm0, XMMWORD PTR [rdx+r8] 001c9 66 0f 5c 04 08 subpd xmm0, XMMWORD PTR [rax+rcx] 001ce 0f 29 85 f0 00 00 00 movaps XMMWORD PTR c4$6[rbp], xmm0 ; 201 : register __m128d c5 = _mm_sub_pd(left[i].f64_x[5], right[i].f64_x[5]); 001d5 48 69 45 08 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 001dd 48 8b 8d 88 02 00 00 mov rcx, QWORD PTR right$[rbp] 001e4 48 03 c8 add rcx, rax 001e7 48 8b c1 mov rax, rcx 001ea b9 10 00 00 00 mov ecx, 16 001ef 48 6b c9 05 imul rcx, rcx, 5 001f3 48 69 55 08 80 00 00 00 imul rdx, QWORD PTR i$1[rbp], 128 ; 00000080H 001fb 4c 8b 85 80 02 00 00 mov r8, QWORD PTR left$[rbp] 00202 4c 03 c2 add r8, rdx 00205 49 8b d0 mov rdx, r8 00208 41 b8 10 00 00 00 mov r8d, 16 0020e 4d 6b c0 05 imul r8, r8, 5 00212 42 0f 10 04 02 movups xmm0, XMMWORD PTR [rdx+r8] 00217 66 0f 5c 04 08 subpd xmm0, XMMWORD PTR [rax+rcx] 0021c 0f 29 85 20 01 00 00 movaps XMMWORD PTR c5$7[rbp], xmm0 ; 202 : register __m128d c6 = _mm_sub_pd(left[i].f64_x[6], right[i].f64_x[6]); 00223 48 69 45 08 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 0022b 48 8b 8d 88 02 00 00 mov rcx, QWORD PTR right$[rbp] 00232 48 03 c8 add rcx, rax 00235 48 8b c1 mov rax, rcx 00238 b9 10 00 00 00 mov ecx, 16 0023d 48 6b c9 06 imul rcx, rcx, 6 00241 48 69 55 08 80 00 00 00 imul rdx, QWORD PTR i$1[rbp], 128 ; 00000080H 00249 4c 8b 85 80 02 00 00 mov r8, QWORD PTR left$[rbp] 00250 4c 03 c2 add r8, rdx 00253 49 8b d0 mov rdx, r8 00256 41 b8 10 00 00 00 mov r8d, 16 0025c 4d 6b c0 06 imul r8, r8, 6 00260 42 0f 10 04 02 movups xmm0, XMMWORD PTR [rdx+r8] 00265 66 0f 5c 04 08 subpd xmm0, XMMWORD PTR [rax+rcx] 0026a 0f 29 85 50 01 00 00 movaps XMMWORD PTR c6$8[rbp], xmm0 ; 203 : register __m128d c7 = _mm_sub_pd(left[i].f64_x[7], right[i].f64_x[7]); 00271 48 69 45 08 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 00279 48 8b 8d 88 02 00 00 mov rcx, QWORD PTR right$[rbp] 00280 48 03 c8 add rcx, rax 00283 48 8b c1 mov rax, rcx 00286 b9 10 00 00 00 mov ecx, 16 0028b 48 6b c9 07 imul rcx, rcx, 7 0028f 48 69 55 08 80 00 00 00 imul rdx, QWORD PTR i$1[rbp], 128 ; 00000080H 00297 4c 8b 85 80 02 00 00 mov r8, QWORD PTR left$[rbp] 0029e 4c 03 c2 add r8, rdx 002a1 49 8b d0 mov rdx, r8 002a4 41 b8 10 00 00 00 mov r8d, 16 002aa 4d 6b c0 07 imul r8, r8, 7 002ae 42 0f 10 04 02 movups xmm0, XMMWORD PTR [rdx+r8] 002b3 66 0f 5c 04 08 subpd xmm0, XMMWORD PTR [rax+rcx] 002b8 0f 29 85 80 01 00 00 movaps XMMWORD PTR c7$9[rbp], xmm0 ; 204 : ; 205 : ans[i].f64_x[0] = c0; 002bf 48 69 45 08 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 002c7 48 8b 8d 90 02 00 00 mov rcx, QWORD PTR ans$[rbp] 002ce 48 03 c8 add rcx, rax 002d1 48 8b c1 mov rax, rcx 002d4 b9 10 00 00 00 mov ecx, 16 002d9 48 6b c9 00 imul rcx, rcx, 0 002dd 0f 28 45 30 movaps xmm0, XMMWORD PTR c0$2[rbp] 002e1 0f 11 04 08 movups XMMWORD PTR [rax+rcx], xmm0 ; 206 : ans[i].f64_x[1] = c1; 002e5 48 69 45 08 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 002ed 48 8b 8d 90 02 00 00 mov rcx, QWORD PTR ans$[rbp] 002f4 48 03 c8 add rcx, rax 002f7 48 8b c1 mov rax, rcx 002fa b9 10 00 00 00 mov ecx, 16 002ff 48 6b c9 01 imul rcx, rcx, 1 00303 0f 28 45 60 movaps xmm0, XMMWORD PTR c1$3[rbp] 00307 0f 11 04 08 movups XMMWORD PTR [rax+rcx], xmm0 ; 207 : ans[i].f64_x[2] = c2; 0030b 48 69 45 08 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 00313 48 8b 8d 90 02 00 00 mov rcx, QWORD PTR ans$[rbp] 0031a 48 03 c8 add rcx, rax 0031d 48 8b c1 mov rax, rcx 00320 b9 10 00 00 00 mov ecx, 16 00325 48 6b c9 02 imul rcx, rcx, 2 00329 0f 28 85 90 00 00 00 movaps xmm0, XMMWORD PTR c2$4[rbp] 00330 0f 11 04 08 movups XMMWORD PTR [rax+rcx], xmm0 ; 208 : ans[i].f64_x[3] = c3; 00334 48 69 45 08 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 0033c 48 8b 8d 90 02 00 00 mov rcx, QWORD PTR ans$[rbp] 00343 48 03 c8 add rcx, rax 00346 48 8b c1 mov rax, rcx 00349 b9 10 00 00 00 mov ecx, 16 0034e 48 6b c9 03 imul rcx, rcx, 3 00352 0f 28 85 c0 00 00 00 movaps xmm0, XMMWORD PTR c3$5[rbp] 00359 0f 11 04 08 movups XMMWORD PTR [rax+rcx], xmm0 ; 209 : ans[i].f64_x[4] = c4; 0035d 48 69 45 08 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 00365 48 8b 8d 90 02 00 00 mov rcx, QWORD PTR ans$[rbp] 0036c 48 03 c8 add rcx, rax 0036f 48 8b c1 mov rax, rcx 00372 b9 10 00 00 00 mov ecx, 16 00377 48 6b c9 04 imul rcx, rcx, 4 0037b 0f 28 85 f0 00 00 00 movaps xmm0, XMMWORD PTR c4$6[rbp] 00382 0f 11 04 08 movups XMMWORD PTR [rax+rcx], xmm0 ; 210 : ans[i].f64_x[5] = c5; 00386 48 69 45 08 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 0038e 48 8b 8d 90 02 00 00 mov rcx, QWORD PTR ans$[rbp] 00395 48 03 c8 add rcx, rax 00398 48 8b c1 mov rax, rcx 0039b b9 10 00 00 00 mov ecx, 16 003a0 48 6b c9 05 imul rcx, rcx, 5 003a4 0f 28 85 20 01 00 00 movaps xmm0, XMMWORD PTR c5$7[rbp] 003ab 0f 11 04 08 movups XMMWORD PTR [rax+rcx], xmm0 ; 211 : ans[i].f64_x[6] = c6; 003af 48 69 45 08 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 003b7 48 8b 8d 90 02 00 00 mov rcx, QWORD PTR ans$[rbp] 003be 48 03 c8 add rcx, rax 003c1 48 8b c1 mov rax, rcx 003c4 b9 10 00 00 00 mov ecx, 16 003c9 48 6b c9 06 imul rcx, rcx, 6 003cd 0f 28 85 50 01 00 00 movaps xmm0, XMMWORD PTR c6$8[rbp] 003d4 0f 11 04 08 movups XMMWORD PTR [rax+rcx], xmm0 ; 212 : ans[i].f64_x[7] = c7; 003d8 48 69 45 08 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 003e0 48 8b 8d 90 02 00 00 mov rcx, QWORD PTR ans$[rbp] 003e7 48 03 c8 add rcx, rax 003ea 48 8b c1 mov rax, rcx 003ed b9 10 00 00 00 mov ecx, 16 003f2 48 6b c9 07 imul rcx, rcx, 7 003f6 0f 28 85 80 01 00 00 movaps xmm0, XMMWORD PTR c7$9[rbp] 003fd 0f 11 04 08 movups XMMWORD PTR [rax+rcx], xmm0 ; 213 : } 00401 e9 33 fc ff ff jmp $LN2@double_buf $LN3@double_buf: ; 214 : } 00406 48 8d a5 68 02 00 00 lea rsp, QWORD PTR [rbp+616] 0040d 5f pop rdi 0040e 5d pop rbp 0040f c3 ret 0 double_buf_sub_sse ENDP _TEXT ENDS ; Function compile flags: /Odtp /RTCsu /ZI ; File D:\platform-dev\StgSharp.Native\sn-src\m.bufop.x86.c ; COMDAT float_buf_sub_512 _TEXT SEGMENT i$1 = 8 c0$2 = 64 left$ = 432 right$ = 440 ans$ = 448 count$ = 456 float_buf_sub_512 PROC ; COMDAT ; 186 : { $LN6: 00000 4c 89 4c 24 20 mov QWORD PTR [rsp+32], r9 00005 4c 89 44 24 18 mov QWORD PTR [rsp+24], r8 0000a 48 89 54 24 10 mov QWORD PTR [rsp+16], rdx 0000f 48 89 4c 24 08 mov QWORD PTR [rsp+8], rcx 00014 41 55 push r13 00016 55 push rbp 00017 57 push rdi 00018 48 81 ec b0 01 00 00 sub rsp, 432 ; 000001b0H 0001f 4c 8d 6c 24 20 lea r13, QWORD PTR [rsp+32] 00024 48 8d 6c 24 60 lea rbp, QWORD PTR [rsp+96] 00029 48 83 e5 c0 and rbp, -64 ; ffffffffffffffc0H 0002d 48 8d 0d 00 00 00 00 lea rcx, OFFSET FLAT:__BAFF6ACF_m@bufop@x86@c 00034 e8 00 00 00 00 call __CheckForDebuggerJustMyCode 00039 90 npad 1 ; 187 : for (size_t i = 0; i < count; i++) { 0003a 48 c7 45 08 00 00 00 00 mov QWORD PTR i$1[rbp], 0 00042 eb 0b jmp SHORT $LN4@float_buf_ $LN2@float_buf_: 00044 48 8b 45 08 mov rax, QWORD PTR i$1[rbp] 00048 48 ff c0 inc rax 0004b 48 89 45 08 mov QWORD PTR i$1[rbp], rax $LN4@float_buf_: 0004f 49 8b 85 c8 01 00 00 mov rax, QWORD PTR count$[r13] 00056 48 39 45 08 cmp QWORD PTR i$1[rbp], rax 0005a 73 7a jae SHORT $LN3@float_buf_ ; 188 : register __m512 c0 = _mm512_sub_ps(left[i].f32_z[0], right[i].f32_z[0]); 0005c 48 6b 45 08 40 imul rax, QWORD PTR i$1[rbp], 64 ; 00000040H 00061 49 8b 8d b8 01 00 00 mov rcx, QWORD PTR right$[r13] 00068 48 03 c8 add rcx, rax 0006b 48 8b c1 mov rax, rcx 0006e b9 40 00 00 00 mov ecx, 64 ; 00000040H 00073 48 6b c9 00 imul rcx, rcx, 0 00077 48 6b 55 08 40 imul rdx, QWORD PTR i$1[rbp], 64 ; 00000040H 0007c 4d 8b 85 b0 01 00 00 mov r8, QWORD PTR left$[r13] 00083 4c 03 c2 add r8, rdx 00086 49 8b d0 mov rdx, r8 00089 41 b8 40 00 00 00 mov r8d, 64 ; 00000040H 0008f 4d 6b c0 00 imul r8, r8, 0 00093 62 b1 7c 48 10 04 02 vmovups zmm0, ZMMWORD PTR [rdx+r8] 0009a 62 f1 7c 48 5c 04 08 vsubps zmm0, zmm0, ZMMWORD PTR [rax+rcx] 000a1 62 f1 7c 48 11 45 01 vmovups ZMMWORD PTR c0$2[rbp], zmm0 ; 189 : ans[i].f32_z[0] = c0; 000a8 48 6b 45 08 40 imul rax, QWORD PTR i$1[rbp], 64 ; 00000040H 000ad 49 8b 8d c0 01 00 00 mov rcx, QWORD PTR ans$[r13] 000b4 48 03 c8 add rcx, rax 000b7 48 8b c1 mov rax, rcx 000ba b9 40 00 00 00 mov ecx, 64 ; 00000040H 000bf 48 6b c9 00 imul rcx, rcx, 0 000c3 62 f1 7c 48 10 45 01 vmovups zmm0, ZMMWORD PTR c0$2[rbp] 000ca 62 f1 7c 48 11 04 08 vmovups ZMMWORD PTR [rax+rcx], zmm0 ; 190 : } 000d1 e9 6e ff ff ff jmp $LN2@float_buf_ $LN3@float_buf_: ; 191 : } 000d6 49 8d a5 90 01 00 00 lea rsp, QWORD PTR [r13+400] 000dd 5f pop rdi 000de 5d pop rbp 000df 41 5d pop r13 000e1 c3 ret 0 float_buf_sub_512 ENDP _TEXT ENDS ; Function compile flags: /Odtp /RTCsu /ZI ; File D:\platform-dev\StgSharp.Native\sn-src\m.bufop.x86.c ; COMDAT float_buf_sub_avx _TEXT SEGMENT i$1 = 8 c0$2 = 64 c1$3 = 128 left$ = 432 right$ = 440 ans$ = 448 count$ = 456 float_buf_sub_avx PROC ; COMDAT ; 176 : { $LN6: 00000 4c 89 4c 24 20 mov QWORD PTR [rsp+32], r9 00005 4c 89 44 24 18 mov QWORD PTR [rsp+24], r8 0000a 48 89 54 24 10 mov QWORD PTR [rsp+16], rdx 0000f 48 89 4c 24 08 mov QWORD PTR [rsp+8], rcx 00014 41 55 push r13 00016 55 push rbp 00017 57 push rdi 00018 48 81 ec b0 01 00 00 sub rsp, 432 ; 000001b0H 0001f 4c 8d 6c 24 20 lea r13, QWORD PTR [rsp+32] 00024 48 8d 6c 24 40 lea rbp, QWORD PTR [rsp+64] 00029 48 83 e5 e0 and rbp, -32 ; ffffffffffffffe0H 0002d 48 8d 0d 00 00 00 00 lea rcx, OFFSET FLAT:__BAFF6ACF_m@bufop@x86@c 00034 e8 00 00 00 00 call __CheckForDebuggerJustMyCode 00039 90 npad 1 ; 177 : for (size_t i = 0; i < count; i++) { 0003a 48 c7 45 08 00 00 00 00 mov QWORD PTR i$1[rbp], 0 00042 eb 0b jmp SHORT $LN4@float_buf_ $LN2@float_buf_: 00044 48 8b 45 08 mov rax, QWORD PTR i$1[rbp] 00048 48 ff c0 inc rax 0004b 48 89 45 08 mov QWORD PTR i$1[rbp], rax $LN4@float_buf_: 0004f 49 8b 85 c8 01 00 00 mov rax, QWORD PTR count$[r13] 00056 48 39 45 08 cmp QWORD PTR i$1[rbp], rax 0005a 0f 83 e3 00 00 00 jae $LN3@float_buf_ ; 178 : register __m256 c0 = _mm256_sub_ps(left[i].f32_y[0], right[i].f32_y[0]); 00060 48 6b 45 08 40 imul rax, QWORD PTR i$1[rbp], 64 ; 00000040H 00065 49 8b 8d b8 01 00 00 mov rcx, QWORD PTR right$[r13] 0006c 48 03 c8 add rcx, rax 0006f 48 8b c1 mov rax, rcx 00072 b9 20 00 00 00 mov ecx, 32 ; 00000020H 00077 48 6b c9 00 imul rcx, rcx, 0 0007b 48 6b 55 08 40 imul rdx, QWORD PTR i$1[rbp], 64 ; 00000040H 00080 4d 8b 85 b0 01 00 00 mov r8, QWORD PTR left$[r13] 00087 4c 03 c2 add r8, rdx 0008a 49 8b d0 mov rdx, r8 0008d 41 b8 20 00 00 00 mov r8d, 32 ; 00000020H 00093 4d 6b c0 00 imul r8, r8, 0 00097 c4 a1 7c 10 04 02 vmovups ymm0, YMMWORD PTR [rdx+r8] 0009d c5 fc 5c 04 08 vsubps ymm0, ymm0, YMMWORD PTR [rax+rcx] 000a2 c5 fc 11 45 40 vmovups YMMWORD PTR c0$2[rbp], ymm0 ; 179 : register __m256 c1 = _mm256_sub_ps(left[i].f32_y[1], right[i].f32_y[1]); 000a7 48 6b 45 08 40 imul rax, QWORD PTR i$1[rbp], 64 ; 00000040H 000ac 49 8b 8d b8 01 00 00 mov rcx, QWORD PTR right$[r13] 000b3 48 03 c8 add rcx, rax 000b6 48 8b c1 mov rax, rcx 000b9 b9 20 00 00 00 mov ecx, 32 ; 00000020H 000be 48 6b c9 01 imul rcx, rcx, 1 000c2 48 6b 55 08 40 imul rdx, QWORD PTR i$1[rbp], 64 ; 00000040H 000c7 4d 8b 85 b0 01 00 00 mov r8, QWORD PTR left$[r13] 000ce 4c 03 c2 add r8, rdx 000d1 49 8b d0 mov rdx, r8 000d4 41 b8 20 00 00 00 mov r8d, 32 ; 00000020H 000da 4d 6b c0 01 imul r8, r8, 1 000de c4 a1 7c 10 04 02 vmovups ymm0, YMMWORD PTR [rdx+r8] 000e4 c5 fc 5c 04 08 vsubps ymm0, ymm0, YMMWORD PTR [rax+rcx] 000e9 c5 fc 11 85 80 00 00 00 vmovups YMMWORD PTR c1$3[rbp], ymm0 ; 180 : ans[i].f32_y[0] = c0; 000f1 48 6b 45 08 40 imul rax, QWORD PTR i$1[rbp], 64 ; 00000040H 000f6 49 8b 8d c0 01 00 00 mov rcx, QWORD PTR ans$[r13] 000fd 48 03 c8 add rcx, rax 00100 48 8b c1 mov rax, rcx 00103 b9 20 00 00 00 mov ecx, 32 ; 00000020H 00108 48 6b c9 00 imul rcx, rcx, 0 0010c c5 fc 10 45 40 vmovups ymm0, YMMWORD PTR c0$2[rbp] 00111 c5 fc 11 04 08 vmovups YMMWORD PTR [rax+rcx], ymm0 ; 181 : ans[i].f32_y[1] = c1; 00116 48 6b 45 08 40 imul rax, QWORD PTR i$1[rbp], 64 ; 00000040H 0011b 49 8b 8d c0 01 00 00 mov rcx, QWORD PTR ans$[r13] 00122 48 03 c8 add rcx, rax 00125 48 8b c1 mov rax, rcx 00128 b9 20 00 00 00 mov ecx, 32 ; 00000020H 0012d 48 6b c9 01 imul rcx, rcx, 1 00131 c5 fc 10 85 80 00 00 00 vmovups ymm0, YMMWORD PTR c1$3[rbp] 00139 c5 fc 11 04 08 vmovups YMMWORD PTR [rax+rcx], ymm0 ; 182 : } 0013e e9 01 ff ff ff jmp $LN2@float_buf_ $LN3@float_buf_: ; 183 : } 00143 49 8d a5 90 01 00 00 lea rsp, QWORD PTR [r13+400] 0014a 5f pop rdi 0014b 5d pop rbp 0014c 41 5d pop r13 0014e c3 ret 0 float_buf_sub_avx ENDP _TEXT ENDS ; Function compile flags: /Odtp /RTCsu /ZI ; File D:\platform-dev\StgSharp.Native\sn-src\m.bufop.x86.c ; COMDAT float_buf_sub_sse _TEXT SEGMENT i$1 = 8 c0$2 = 48 c1$3 = 96 c2$4 = 144 c3$5 = 192 left$ = 448 right$ = 456 ans$ = 464 count$ = 472 float_buf_sub_sse PROC ; COMDAT ; 161 : { $LN6: 00000 4c 89 4c 24 20 mov QWORD PTR [rsp+32], r9 00005 4c 89 44 24 18 mov QWORD PTR [rsp+24], r8 0000a 48 89 54 24 10 mov QWORD PTR [rsp+16], rdx 0000f 48 89 4c 24 08 mov QWORD PTR [rsp+8], rcx 00014 55 push rbp 00015 57 push rdi 00016 48 81 ec c8 01 00 00 sub rsp, 456 ; 000001c8H 0001d 48 8d 6c 24 20 lea rbp, QWORD PTR [rsp+32] 00022 48 8d 0d 00 00 00 00 lea rcx, OFFSET FLAT:__BAFF6ACF_m@bufop@x86@c 00029 e8 00 00 00 00 call __CheckForDebuggerJustMyCode 0002e 90 npad 1 ; 162 : for (size_t i = 0; i < count; i++) { 0002f 48 c7 45 08 00 00 00 00 mov QWORD PTR i$1[rbp], 0 00037 eb 0b jmp SHORT $LN4@float_buf_ $LN2@float_buf_: 00039 48 8b 45 08 mov rax, QWORD PTR i$1[rbp] 0003d 48 ff c0 inc rax 00040 48 89 45 08 mov QWORD PTR i$1[rbp], rax $LN4@float_buf_: 00044 48 8b 85 d8 01 00 00 mov rax, QWORD PTR count$[rbp] 0004b 48 39 45 08 cmp QWORD PTR i$1[rbp], rax 0004f 0f 83 ad 01 00 00 jae $LN3@float_buf_ ; 163 : register __m128 c0 = _mm_sub_ps(left[i].f32_x[0], right[i].f32_x[0]); 00055 48 6b 45 08 40 imul rax, QWORD PTR i$1[rbp], 64 ; 00000040H 0005a 48 8b 8d c8 01 00 00 mov rcx, QWORD PTR right$[rbp] 00061 48 03 c8 add rcx, rax 00064 48 8b c1 mov rax, rcx 00067 b9 10 00 00 00 mov ecx, 16 0006c 48 6b c9 00 imul rcx, rcx, 0 00070 48 6b 55 08 40 imul rdx, QWORD PTR i$1[rbp], 64 ; 00000040H 00075 4c 8b 85 c0 01 00 00 mov r8, QWORD PTR left$[rbp] 0007c 4c 03 c2 add r8, rdx 0007f 49 8b d0 mov rdx, r8 00082 41 b8 10 00 00 00 mov r8d, 16 00088 4d 6b c0 00 imul r8, r8, 0 0008c 42 0f 10 04 02 movups xmm0, XMMWORD PTR [rdx+r8] 00091 0f 5c 04 08 subps xmm0, XMMWORD PTR [rax+rcx] 00095 0f 29 45 30 movaps XMMWORD PTR c0$2[rbp], xmm0 ; 164 : register __m128 c1 = _mm_sub_ps(left[i].f32_x[1], right[i].f32_x[1]); 00099 48 6b 45 08 40 imul rax, QWORD PTR i$1[rbp], 64 ; 00000040H 0009e 48 8b 8d c8 01 00 00 mov rcx, QWORD PTR right$[rbp] 000a5 48 03 c8 add rcx, rax 000a8 48 8b c1 mov rax, rcx 000ab b9 10 00 00 00 mov ecx, 16 000b0 48 6b c9 01 imul rcx, rcx, 1 000b4 48 6b 55 08 40 imul rdx, QWORD PTR i$1[rbp], 64 ; 00000040H 000b9 4c 8b 85 c0 01 00 00 mov r8, QWORD PTR left$[rbp] 000c0 4c 03 c2 add r8, rdx 000c3 49 8b d0 mov rdx, r8 000c6 41 b8 10 00 00 00 mov r8d, 16 000cc 4d 6b c0 01 imul r8, r8, 1 000d0 42 0f 10 04 02 movups xmm0, XMMWORD PTR [rdx+r8] 000d5 0f 5c 04 08 subps xmm0, XMMWORD PTR [rax+rcx] 000d9 0f 29 45 60 movaps XMMWORD PTR c1$3[rbp], xmm0 ; 165 : register __m128 c2 = _mm_sub_ps(left[i].f32_x[2], right[i].f32_x[2]); 000dd 48 6b 45 08 40 imul rax, QWORD PTR i$1[rbp], 64 ; 00000040H 000e2 48 8b 8d c8 01 00 00 mov rcx, QWORD PTR right$[rbp] 000e9 48 03 c8 add rcx, rax 000ec 48 8b c1 mov rax, rcx 000ef b9 10 00 00 00 mov ecx, 16 000f4 48 6b c9 02 imul rcx, rcx, 2 000f8 48 6b 55 08 40 imul rdx, QWORD PTR i$1[rbp], 64 ; 00000040H 000fd 4c 8b 85 c0 01 00 00 mov r8, QWORD PTR left$[rbp] 00104 4c 03 c2 add r8, rdx 00107 49 8b d0 mov rdx, r8 0010a 41 b8 10 00 00 00 mov r8d, 16 00110 4d 6b c0 02 imul r8, r8, 2 00114 42 0f 10 04 02 movups xmm0, XMMWORD PTR [rdx+r8] 00119 0f 5c 04 08 subps xmm0, XMMWORD PTR [rax+rcx] 0011d 0f 29 85 90 00 00 00 movaps XMMWORD PTR c2$4[rbp], xmm0 ; 166 : register __m128 c3 = _mm_sub_ps(left[i].f32_x[3], right[i].f32_x[3]); 00124 48 6b 45 08 40 imul rax, QWORD PTR i$1[rbp], 64 ; 00000040H 00129 48 8b 8d c8 01 00 00 mov rcx, QWORD PTR right$[rbp] 00130 48 03 c8 add rcx, rax 00133 48 8b c1 mov rax, rcx 00136 b9 10 00 00 00 mov ecx, 16 0013b 48 6b c9 03 imul rcx, rcx, 3 0013f 48 6b 55 08 40 imul rdx, QWORD PTR i$1[rbp], 64 ; 00000040H 00144 4c 8b 85 c0 01 00 00 mov r8, QWORD PTR left$[rbp] 0014b 4c 03 c2 add r8, rdx 0014e 49 8b d0 mov rdx, r8 00151 41 b8 10 00 00 00 mov r8d, 16 00157 4d 6b c0 03 imul r8, r8, 3 0015b 42 0f 10 04 02 movups xmm0, XMMWORD PTR [rdx+r8] 00160 0f 5c 04 08 subps xmm0, XMMWORD PTR [rax+rcx] 00164 0f 29 85 c0 00 00 00 movaps XMMWORD PTR c3$5[rbp], xmm0 ; 167 : ; 168 : ans[i].f32_x[0] = c0; 0016b 48 6b 45 08 40 imul rax, QWORD PTR i$1[rbp], 64 ; 00000040H 00170 48 8b 8d d0 01 00 00 mov rcx, QWORD PTR ans$[rbp] 00177 48 03 c8 add rcx, rax 0017a 48 8b c1 mov rax, rcx 0017d b9 10 00 00 00 mov ecx, 16 00182 48 6b c9 00 imul rcx, rcx, 0 00186 0f 28 45 30 movaps xmm0, XMMWORD PTR c0$2[rbp] 0018a 0f 11 04 08 movups XMMWORD PTR [rax+rcx], xmm0 ; 169 : ans[i].f32_x[1] = c1; 0018e 48 6b 45 08 40 imul rax, QWORD PTR i$1[rbp], 64 ; 00000040H 00193 48 8b 8d d0 01 00 00 mov rcx, QWORD PTR ans$[rbp] 0019a 48 03 c8 add rcx, rax 0019d 48 8b c1 mov rax, rcx 001a0 b9 10 00 00 00 mov ecx, 16 001a5 48 6b c9 01 imul rcx, rcx, 1 001a9 0f 28 45 60 movaps xmm0, XMMWORD PTR c1$3[rbp] 001ad 0f 11 04 08 movups XMMWORD PTR [rax+rcx], xmm0 ; 170 : ans[i].f32_x[2] = c2; 001b1 48 6b 45 08 40 imul rax, QWORD PTR i$1[rbp], 64 ; 00000040H 001b6 48 8b 8d d0 01 00 00 mov rcx, QWORD PTR ans$[rbp] 001bd 48 03 c8 add rcx, rax 001c0 48 8b c1 mov rax, rcx 001c3 b9 10 00 00 00 mov ecx, 16 001c8 48 6b c9 02 imul rcx, rcx, 2 001cc 0f 28 85 90 00 00 00 movaps xmm0, XMMWORD PTR c2$4[rbp] 001d3 0f 11 04 08 movups XMMWORD PTR [rax+rcx], xmm0 ; 171 : ans[i].f32_x[3] = c3; 001d7 48 6b 45 08 40 imul rax, QWORD PTR i$1[rbp], 64 ; 00000040H 001dc 48 8b 8d d0 01 00 00 mov rcx, QWORD PTR ans$[rbp] 001e3 48 03 c8 add rcx, rax 001e6 48 8b c1 mov rax, rcx 001e9 b9 10 00 00 00 mov ecx, 16 001ee 48 6b c9 03 imul rcx, rcx, 3 001f2 0f 28 85 c0 00 00 00 movaps xmm0, XMMWORD PTR c3$5[rbp] 001f9 0f 11 04 08 movups XMMWORD PTR [rax+rcx], xmm0 ; 172 : } 001fd e9 37 fe ff ff jmp $LN2@float_buf_ $LN3@float_buf_: ; 173 : } 00202 48 8d a5 a8 01 00 00 lea rsp, QWORD PTR [rbp+424] 00209 5f pop rdi 0020a 5d pop rbp 0020b c3 ret 0 float_buf_sub_sse ENDP _TEXT ENDS ; Function compile flags: /Odtp /RTCsu /ZI ; File D:\platform-dev\StgSharp.Native\sn-src\m.bufop.x86.c ; COMDAT double_buf_add_512 _TEXT SEGMENT i$1 = 8 c0$2 = 64 c1$3 = 192 left$ = 560 right$ = 568 ans$ = 576 count$ = 584 double_buf_add_512 PROC ; COMDAT ; 151 : { $LN6: 00000 4c 89 4c 24 20 mov QWORD PTR [rsp+32], r9 00005 4c 89 44 24 18 mov QWORD PTR [rsp+24], r8 0000a 48 89 54 24 10 mov QWORD PTR [rsp+16], rdx 0000f 48 89 4c 24 08 mov QWORD PTR [rsp+8], rcx 00014 41 55 push r13 00016 55 push rbp 00017 57 push rdi 00018 48 81 ec 30 02 00 00 sub rsp, 560 ; 00000230H 0001f 4c 8d 6c 24 20 lea r13, QWORD PTR [rsp+32] 00024 48 8d 6c 24 60 lea rbp, QWORD PTR [rsp+96] 00029 48 83 e5 c0 and rbp, -64 ; ffffffffffffffc0H 0002d 48 8d 0d 00 00 00 00 lea rcx, OFFSET FLAT:__BAFF6ACF_m@bufop@x86@c 00034 e8 00 00 00 00 call __CheckForDebuggerJustMyCode 00039 90 npad 1 ; 152 : for (size_t i = 0; i < count; i++) { 0003a 48 c7 45 08 00 00 00 00 mov QWORD PTR i$1[rbp], 0 00042 eb 0b jmp SHORT $LN4@double_buf $LN2@double_buf: 00044 48 8b 45 08 mov rax, QWORD PTR i$1[rbp] 00048 48 ff c0 inc rax 0004b 48 89 45 08 mov QWORD PTR i$1[rbp], rax $LN4@double_buf: 0004f 49 8b 85 48 02 00 00 mov rax, QWORD PTR count$[r13] 00056 48 39 45 08 cmp QWORD PTR i$1[rbp], rax 0005a 0f 83 01 01 00 00 jae $LN3@double_buf ; 153 : register __m512d c0 = _mm512_add_pd(left[i].f64_z[0], right[i].f64_z[0]); 00060 48 69 45 08 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 00068 49 8b 8d 38 02 00 00 mov rcx, QWORD PTR right$[r13] 0006f 48 03 c8 add rcx, rax 00072 48 8b c1 mov rax, rcx 00075 b9 40 00 00 00 mov ecx, 64 ; 00000040H 0007a 48 6b c9 00 imul rcx, rcx, 0 0007e 48 69 55 08 80 00 00 00 imul rdx, QWORD PTR i$1[rbp], 128 ; 00000080H 00086 4d 8b 85 30 02 00 00 mov r8, QWORD PTR left$[r13] 0008d 4c 03 c2 add r8, rdx 00090 49 8b d0 mov rdx, r8 00093 41 b8 40 00 00 00 mov r8d, 64 ; 00000040H 00099 4d 6b c0 00 imul r8, r8, 0 0009d 62 b1 fd 48 10 04 02 vmovupd zmm0, ZMMWORD PTR [rdx+r8] 000a4 62 f1 fd 48 58 04 08 vaddpd zmm0, zmm0, ZMMWORD PTR [rax+rcx] 000ab 62 f1 fd 48 11 45 01 vmovupd ZMMWORD PTR c0$2[rbp], zmm0 ; 154 : register __m512d c1 = _mm512_add_pd(left[i].f64_z[1], right[i].f64_z[1]); 000b2 48 69 45 08 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 000ba 49 8b 8d 38 02 00 00 mov rcx, QWORD PTR right$[r13] 000c1 48 03 c8 add rcx, rax 000c4 48 8b c1 mov rax, rcx 000c7 b9 40 00 00 00 mov ecx, 64 ; 00000040H 000cc 48 6b c9 01 imul rcx, rcx, 1 000d0 48 69 55 08 80 00 00 00 imul rdx, QWORD PTR i$1[rbp], 128 ; 00000080H 000d8 4d 8b 85 30 02 00 00 mov r8, QWORD PTR left$[r13] 000df 4c 03 c2 add r8, rdx 000e2 49 8b d0 mov rdx, r8 000e5 41 b8 40 00 00 00 mov r8d, 64 ; 00000040H 000eb 4d 6b c0 01 imul r8, r8, 1 000ef 62 b1 fd 48 10 04 02 vmovupd zmm0, ZMMWORD PTR [rdx+r8] 000f6 62 f1 fd 48 58 04 08 vaddpd zmm0, zmm0, ZMMWORD PTR [rax+rcx] 000fd 62 f1 fd 48 11 45 03 vmovupd ZMMWORD PTR c1$3[rbp], zmm0 ; 155 : ans[i].f64_z[0] = c0; 00104 48 69 45 08 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 0010c 49 8b 8d 40 02 00 00 mov rcx, QWORD PTR ans$[r13] 00113 48 03 c8 add rcx, rax 00116 48 8b c1 mov rax, rcx 00119 b9 40 00 00 00 mov ecx, 64 ; 00000040H 0011e 48 6b c9 00 imul rcx, rcx, 0 00122 62 f1 fd 48 10 45 01 vmovupd zmm0, ZMMWORD PTR c0$2[rbp] 00129 62 f1 fd 48 11 04 08 vmovupd ZMMWORD PTR [rax+rcx], zmm0 ; 156 : ans[i].f64_z[1] = c1; 00130 48 69 45 08 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 00138 49 8b 8d 40 02 00 00 mov rcx, QWORD PTR ans$[r13] 0013f 48 03 c8 add rcx, rax 00142 48 8b c1 mov rax, rcx 00145 b9 40 00 00 00 mov ecx, 64 ; 00000040H 0014a 48 6b c9 01 imul rcx, rcx, 1 0014e 62 f1 fd 48 10 45 03 vmovupd zmm0, ZMMWORD PTR c1$3[rbp] 00155 62 f1 fd 48 11 04 08 vmovupd ZMMWORD PTR [rax+rcx], zmm0 ; 157 : } 0015c e9 e3 fe ff ff jmp $LN2@double_buf $LN3@double_buf: ; 158 : } 00161 49 8d a5 10 02 00 00 lea rsp, QWORD PTR [r13+528] 00168 5f pop rdi 00169 5d pop rbp 0016a 41 5d pop r13 0016c c3 ret 0 double_buf_add_512 ENDP _TEXT ENDS ; Function compile flags: /Odtp /RTCsu /ZI ; File D:\platform-dev\StgSharp.Native\sn-src\m.bufop.x86.c ; COMDAT double_buf_add_avx _TEXT SEGMENT i$1 = 8 s$2 = 40 c0$3 = 96 c1$4 = 160 c2$5 = 224 c3$6 = 288 left$ = 592 right$ = 600 ans$ = 608 count$ = 616 double_buf_add_avx PROC ; COMDAT ; 136 : { $LN6: 00000 4c 89 4c 24 20 mov QWORD PTR [rsp+32], r9 00005 4c 89 44 24 18 mov QWORD PTR [rsp+24], r8 0000a 48 89 54 24 10 mov QWORD PTR [rsp+16], rdx 0000f 48 89 4c 24 08 mov QWORD PTR [rsp+8], rcx 00014 41 55 push r13 00016 55 push rbp 00017 57 push rdi 00018 48 81 ec 50 02 00 00 sub rsp, 592 ; 00000250H 0001f 4c 8d 6c 24 20 lea r13, QWORD PTR [rsp+32] 00024 48 8d 6c 24 40 lea rbp, QWORD PTR [rsp+64] 00029 48 83 e5 e0 and rbp, -32 ; ffffffffffffffe0H 0002d 48 8d 0d 00 00 00 00 lea rcx, OFFSET FLAT:__BAFF6ACF_m@bufop@x86@c 00034 e8 00 00 00 00 call __CheckForDebuggerJustMyCode 00039 90 npad 1 ; 137 : for (size_t i = 0; i < count; i++) { 0003a 48 c7 45 08 00 00 00 00 mov QWORD PTR i$1[rbp], 0 00042 eb 0b jmp SHORT $LN4@double_buf $LN2@double_buf: 00044 48 8b 45 08 mov rax, QWORD PTR i$1[rbp] 00048 48 ff c0 inc rax 0004b 48 89 45 08 mov QWORD PTR i$1[rbp], rax $LN4@double_buf: 0004f 49 8b 85 68 02 00 00 mov rax, QWORD PTR count$[r13] 00056 48 39 45 08 cmp QWORD PTR i$1[rbp], rax 0005a 0f 83 f3 01 00 00 jae $LN3@double_buf ; 138 : size_t s = sizeof(MAT_KERNEL(float)); 00060 48 c7 45 28 40 00 00 00 mov QWORD PTR s$2[rbp], 64 ; 00000040H ; 139 : register __m256d c0 = _mm256_add_pd(left[i].f64_y[0], right[i].f64_y[0]); 00068 48 69 45 08 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 00070 49 8b 8d 58 02 00 00 mov rcx, QWORD PTR right$[r13] 00077 48 03 c8 add rcx, rax 0007a 48 8b c1 mov rax, rcx 0007d b9 20 00 00 00 mov ecx, 32 ; 00000020H 00082 48 6b c9 00 imul rcx, rcx, 0 00086 48 69 55 08 80 00 00 00 imul rdx, QWORD PTR i$1[rbp], 128 ; 00000080H 0008e 4d 8b 85 50 02 00 00 mov r8, QWORD PTR left$[r13] 00095 4c 03 c2 add r8, rdx 00098 49 8b d0 mov rdx, r8 0009b 41 b8 20 00 00 00 mov r8d, 32 ; 00000020H 000a1 4d 6b c0 00 imul r8, r8, 0 000a5 c4 a1 7d 10 04 02 vmovupd ymm0, YMMWORD PTR [rdx+r8] 000ab c5 fd 58 04 08 vaddpd ymm0, ymm0, YMMWORD PTR [rax+rcx] 000b0 c5 fd 11 45 60 vmovupd YMMWORD PTR c0$3[rbp], ymm0 ; 140 : register __m256d c1 = _mm256_add_pd(left[i].f64_y[1], right[i].f64_y[1]); 000b5 48 69 45 08 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 000bd 49 8b 8d 58 02 00 00 mov rcx, QWORD PTR right$[r13] 000c4 48 03 c8 add rcx, rax 000c7 48 8b c1 mov rax, rcx 000ca b9 20 00 00 00 mov ecx, 32 ; 00000020H 000cf 48 6b c9 01 imul rcx, rcx, 1 000d3 48 69 55 08 80 00 00 00 imul rdx, QWORD PTR i$1[rbp], 128 ; 00000080H 000db 4d 8b 85 50 02 00 00 mov r8, QWORD PTR left$[r13] 000e2 4c 03 c2 add r8, rdx 000e5 49 8b d0 mov rdx, r8 000e8 41 b8 20 00 00 00 mov r8d, 32 ; 00000020H 000ee 4d 6b c0 01 imul r8, r8, 1 000f2 c4 a1 7d 10 04 02 vmovupd ymm0, YMMWORD PTR [rdx+r8] 000f8 c5 fd 58 04 08 vaddpd ymm0, ymm0, YMMWORD PTR [rax+rcx] 000fd c5 fd 11 85 a0 00 00 00 vmovupd YMMWORD PTR c1$4[rbp], ymm0 ; 141 : register __m256d c2 = _mm256_add_pd(left[i].f64_y[0], right[i].f64_y[0]); 00105 48 69 45 08 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 0010d 49 8b 8d 58 02 00 00 mov rcx, QWORD PTR right$[r13] 00114 48 03 c8 add rcx, rax 00117 48 8b c1 mov rax, rcx 0011a b9 20 00 00 00 mov ecx, 32 ; 00000020H 0011f 48 6b c9 00 imul rcx, rcx, 0 00123 48 69 55 08 80 00 00 00 imul rdx, QWORD PTR i$1[rbp], 128 ; 00000080H 0012b 4d 8b 85 50 02 00 00 mov r8, QWORD PTR left$[r13] 00132 4c 03 c2 add r8, rdx 00135 49 8b d0 mov rdx, r8 00138 41 b8 20 00 00 00 mov r8d, 32 ; 00000020H 0013e 4d 6b c0 00 imul r8, r8, 0 00142 c4 a1 7d 10 04 02 vmovupd ymm0, YMMWORD PTR [rdx+r8] 00148 c5 fd 58 04 08 vaddpd ymm0, ymm0, YMMWORD PTR [rax+rcx] 0014d c5 fd 11 85 e0 00 00 00 vmovupd YMMWORD PTR c2$5[rbp], ymm0 ; 142 : register __m256d c3 = _mm256_add_pd(left[i].f64_y[1], right[i].f64_y[1]); 00155 48 69 45 08 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 0015d 49 8b 8d 58 02 00 00 mov rcx, QWORD PTR right$[r13] 00164 48 03 c8 add rcx, rax 00167 48 8b c1 mov rax, rcx 0016a b9 20 00 00 00 mov ecx, 32 ; 00000020H 0016f 48 6b c9 01 imul rcx, rcx, 1 00173 48 69 55 08 80 00 00 00 imul rdx, QWORD PTR i$1[rbp], 128 ; 00000080H 0017b 4d 8b 85 50 02 00 00 mov r8, QWORD PTR left$[r13] 00182 4c 03 c2 add r8, rdx 00185 49 8b d0 mov rdx, r8 00188 41 b8 20 00 00 00 mov r8d, 32 ; 00000020H 0018e 4d 6b c0 01 imul r8, r8, 1 00192 c4 a1 7d 10 04 02 vmovupd ymm0, YMMWORD PTR [rdx+r8] 00198 c5 fd 58 04 08 vaddpd ymm0, ymm0, YMMWORD PTR [rax+rcx] 0019d c5 fd 11 85 20 01 00 00 vmovupd YMMWORD PTR c3$6[rbp], ymm0 ; 143 : ans[i].f64_y[0] = c0; 001a5 48 69 45 08 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 001ad 49 8b 8d 60 02 00 00 mov rcx, QWORD PTR ans$[r13] 001b4 48 03 c8 add rcx, rax 001b7 48 8b c1 mov rax, rcx 001ba b9 20 00 00 00 mov ecx, 32 ; 00000020H 001bf 48 6b c9 00 imul rcx, rcx, 0 001c3 c5 fd 10 45 60 vmovupd ymm0, YMMWORD PTR c0$3[rbp] 001c8 c5 fd 11 04 08 vmovupd YMMWORD PTR [rax+rcx], ymm0 ; 144 : ans[i].f64_y[1] = c1; 001cd 48 69 45 08 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 001d5 49 8b 8d 60 02 00 00 mov rcx, QWORD PTR ans$[r13] 001dc 48 03 c8 add rcx, rax 001df 48 8b c1 mov rax, rcx 001e2 b9 20 00 00 00 mov ecx, 32 ; 00000020H 001e7 48 6b c9 01 imul rcx, rcx, 1 001eb c5 fd 10 85 a0 00 00 00 vmovupd ymm0, YMMWORD PTR c1$4[rbp] 001f3 c5 fd 11 04 08 vmovupd YMMWORD PTR [rax+rcx], ymm0 ; 145 : ans[i].f64_y[2] = c2; 001f8 48 69 45 08 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 00200 49 8b 8d 60 02 00 00 mov rcx, QWORD PTR ans$[r13] 00207 48 03 c8 add rcx, rax 0020a 48 8b c1 mov rax, rcx 0020d b9 20 00 00 00 mov ecx, 32 ; 00000020H 00212 48 6b c9 02 imul rcx, rcx, 2 00216 c5 fd 10 85 e0 00 00 00 vmovupd ymm0, YMMWORD PTR c2$5[rbp] 0021e c5 fd 11 04 08 vmovupd YMMWORD PTR [rax+rcx], ymm0 ; 146 : ans[i].f64_y[3] = c3; 00223 48 69 45 08 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 0022b 49 8b 8d 60 02 00 00 mov rcx, QWORD PTR ans$[r13] 00232 48 03 c8 add rcx, rax 00235 48 8b c1 mov rax, rcx 00238 b9 20 00 00 00 mov ecx, 32 ; 00000020H 0023d 48 6b c9 03 imul rcx, rcx, 3 00241 c5 fd 10 85 20 01 00 00 vmovupd ymm0, YMMWORD PTR c3$6[rbp] 00249 c5 fd 11 04 08 vmovupd YMMWORD PTR [rax+rcx], ymm0 ; 147 : } 0024e e9 f1 fd ff ff jmp $LN2@double_buf $LN3@double_buf: ; 148 : } 00253 49 8d a5 30 02 00 00 lea rsp, QWORD PTR [r13+560] 0025a 5f pop rdi 0025b 5d pop rbp 0025c 41 5d pop r13 0025e c3 ret 0 double_buf_add_avx ENDP _TEXT ENDS ; Function compile flags: /Odtp /RTCsu /ZI ; File D:\platform-dev\StgSharp.Native\sn-src\m.bufop.x86.c ; COMDAT double_buf_add_sse _TEXT SEGMENT i$1 = 8 c0$2 = 48 c1$3 = 96 c2$4 = 144 c3$5 = 192 c4$6 = 240 c5$7 = 288 c6$8 = 336 c7$9 = 384 left$ = 640 right$ = 648 ans$ = 656 count$ = 664 double_buf_add_sse PROC ; COMDAT ; 105 : { $LN6: 00000 4c 89 4c 24 20 mov QWORD PTR [rsp+32], r9 00005 4c 89 44 24 18 mov QWORD PTR [rsp+24], r8 0000a 48 89 54 24 10 mov QWORD PTR [rsp+16], rdx 0000f 48 89 4c 24 08 mov QWORD PTR [rsp+8], rcx 00014 55 push rbp 00015 57 push rdi 00016 48 81 ec 88 02 00 00 sub rsp, 648 ; 00000288H 0001d 48 8d 6c 24 20 lea rbp, QWORD PTR [rsp+32] 00022 48 8d 0d 00 00 00 00 lea rcx, OFFSET FLAT:__BAFF6ACF_m@bufop@x86@c 00029 e8 00 00 00 00 call __CheckForDebuggerJustMyCode 0002e 90 npad 1 ; 106 : for (size_t i = 0; i < count; i++) { 0002f 48 c7 45 08 00 00 00 00 mov QWORD PTR i$1[rbp], 0 00037 eb 0b jmp SHORT $LN4@double_buf $LN2@double_buf: 00039 48 8b 45 08 mov rax, QWORD PTR i$1[rbp] 0003d 48 ff c0 inc rax 00040 48 89 45 08 mov QWORD PTR i$1[rbp], rax $LN4@double_buf: 00044 48 8b 85 98 02 00 00 mov rax, QWORD PTR count$[rbp] 0004b 48 39 45 08 cmp QWORD PTR i$1[rbp], rax 0004f 0f 83 d1 03 00 00 jae $LN3@double_buf ; 107 : register __m128d c0 = _mm_add_pd(_mm_castps_pd(left[i].f32_x[0]), 00055 48 69 45 08 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 0005d 48 8b 8d 88 02 00 00 mov rcx, QWORD PTR right$[rbp] 00064 48 03 c8 add rcx, rax 00067 48 8b c1 mov rax, rcx 0006a b9 10 00 00 00 mov ecx, 16 0006f 48 6b c9 00 imul rcx, rcx, 0 00073 0f 10 04 08 movups xmm0, XMMWORD PTR [rax+rcx] 00077 48 69 45 08 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 0007f 48 8b 8d 80 02 00 00 mov rcx, QWORD PTR left$[rbp] 00086 48 03 c8 add rcx, rax 00089 48 8b c1 mov rax, rcx 0008c b9 10 00 00 00 mov ecx, 16 00091 48 6b c9 00 imul rcx, rcx, 0 00095 0f 10 0c 08 movups xmm1, XMMWORD PTR [rax+rcx] 00099 66 0f 58 c8 addpd xmm1, xmm0 0009d 0f 28 c1 movaps xmm0, xmm1 000a0 0f 29 45 30 movaps XMMWORD PTR c0$2[rbp], xmm0 ; 108 : _mm_castps_pd(right[i].f32_x[0])); ; 109 : register __m128d c1 = _mm_add_pd(_mm_castps_pd(left[i].f32_x[1]), 000a4 48 69 45 08 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 000ac 48 8b 8d 88 02 00 00 mov rcx, QWORD PTR right$[rbp] 000b3 48 03 c8 add rcx, rax 000b6 48 8b c1 mov rax, rcx 000b9 b9 10 00 00 00 mov ecx, 16 000be 48 6b c9 01 imul rcx, rcx, 1 000c2 0f 10 04 08 movups xmm0, XMMWORD PTR [rax+rcx] 000c6 48 69 45 08 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 000ce 48 8b 8d 80 02 00 00 mov rcx, QWORD PTR left$[rbp] 000d5 48 03 c8 add rcx, rax 000d8 48 8b c1 mov rax, rcx 000db b9 10 00 00 00 mov ecx, 16 000e0 48 6b c9 01 imul rcx, rcx, 1 000e4 0f 10 0c 08 movups xmm1, XMMWORD PTR [rax+rcx] 000e8 66 0f 58 c8 addpd xmm1, xmm0 000ec 0f 28 c1 movaps xmm0, xmm1 000ef 0f 29 45 60 movaps XMMWORD PTR c1$3[rbp], xmm0 ; 110 : _mm_castps_pd(right[i].f32_x[1])); ; 111 : register __m128d c2 = _mm_add_pd(_mm_castps_pd(left[i].f32_x[2]), 000f3 48 69 45 08 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 000fb 48 8b 8d 88 02 00 00 mov rcx, QWORD PTR right$[rbp] 00102 48 03 c8 add rcx, rax 00105 48 8b c1 mov rax, rcx 00108 b9 10 00 00 00 mov ecx, 16 0010d 48 6b c9 02 imul rcx, rcx, 2 00111 0f 10 04 08 movups xmm0, XMMWORD PTR [rax+rcx] 00115 48 69 45 08 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 0011d 48 8b 8d 80 02 00 00 mov rcx, QWORD PTR left$[rbp] 00124 48 03 c8 add rcx, rax 00127 48 8b c1 mov rax, rcx 0012a b9 10 00 00 00 mov ecx, 16 0012f 48 6b c9 02 imul rcx, rcx, 2 00133 0f 10 0c 08 movups xmm1, XMMWORD PTR [rax+rcx] 00137 66 0f 58 c8 addpd xmm1, xmm0 0013b 0f 28 c1 movaps xmm0, xmm1 0013e 0f 29 85 90 00 00 00 movaps XMMWORD PTR c2$4[rbp], xmm0 ; 112 : _mm_castps_pd(right[i].f32_x[2])); ; 113 : register __m128d c3 = _mm_add_pd(_mm_castps_pd(left[i].f32_x[3]), 00145 48 69 45 08 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 0014d 48 8b 8d 88 02 00 00 mov rcx, QWORD PTR right$[rbp] 00154 48 03 c8 add rcx, rax 00157 48 8b c1 mov rax, rcx 0015a b9 10 00 00 00 mov ecx, 16 0015f 48 6b c9 03 imul rcx, rcx, 3 00163 0f 10 04 08 movups xmm0, XMMWORD PTR [rax+rcx] 00167 48 69 45 08 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 0016f 48 8b 8d 80 02 00 00 mov rcx, QWORD PTR left$[rbp] 00176 48 03 c8 add rcx, rax 00179 48 8b c1 mov rax, rcx 0017c b9 10 00 00 00 mov ecx, 16 00181 48 6b c9 03 imul rcx, rcx, 3 00185 0f 10 0c 08 movups xmm1, XMMWORD PTR [rax+rcx] 00189 66 0f 58 c8 addpd xmm1, xmm0 0018d 0f 28 c1 movaps xmm0, xmm1 00190 0f 29 85 c0 00 00 00 movaps XMMWORD PTR c3$5[rbp], xmm0 ; 114 : _mm_castps_pd(right[i].f32_x[3])); ; 115 : register __m128d c4 = _mm_add_pd(_mm_castps_pd(left[i].f32_x[4]), 00197 48 69 45 08 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 0019f 48 8b 8d 88 02 00 00 mov rcx, QWORD PTR right$[rbp] 001a6 48 03 c8 add rcx, rax 001a9 48 8b c1 mov rax, rcx 001ac b9 10 00 00 00 mov ecx, 16 001b1 48 6b c9 04 imul rcx, rcx, 4 001b5 0f 10 04 08 movups xmm0, XMMWORD PTR [rax+rcx] 001b9 48 69 45 08 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 001c1 48 8b 8d 80 02 00 00 mov rcx, QWORD PTR left$[rbp] 001c8 48 03 c8 add rcx, rax 001cb 48 8b c1 mov rax, rcx 001ce b9 10 00 00 00 mov ecx, 16 001d3 48 6b c9 04 imul rcx, rcx, 4 001d7 0f 10 0c 08 movups xmm1, XMMWORD PTR [rax+rcx] 001db 66 0f 58 c8 addpd xmm1, xmm0 001df 0f 28 c1 movaps xmm0, xmm1 001e2 0f 29 85 f0 00 00 00 movaps XMMWORD PTR c4$6[rbp], xmm0 ; 116 : _mm_castps_pd(right[i].f32_x[4])); ; 117 : register __m128d c5 = _mm_add_pd(_mm_castps_pd(left[i].f32_x[5]), 001e9 48 69 45 08 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 001f1 48 8b 8d 88 02 00 00 mov rcx, QWORD PTR right$[rbp] 001f8 48 03 c8 add rcx, rax 001fb 48 8b c1 mov rax, rcx 001fe b9 10 00 00 00 mov ecx, 16 00203 48 6b c9 05 imul rcx, rcx, 5 00207 0f 10 04 08 movups xmm0, XMMWORD PTR [rax+rcx] 0020b 48 69 45 08 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 00213 48 8b 8d 80 02 00 00 mov rcx, QWORD PTR left$[rbp] 0021a 48 03 c8 add rcx, rax 0021d 48 8b c1 mov rax, rcx 00220 b9 10 00 00 00 mov ecx, 16 00225 48 6b c9 05 imul rcx, rcx, 5 00229 0f 10 0c 08 movups xmm1, XMMWORD PTR [rax+rcx] 0022d 66 0f 58 c8 addpd xmm1, xmm0 00231 0f 28 c1 movaps xmm0, xmm1 00234 0f 29 85 20 01 00 00 movaps XMMWORD PTR c5$7[rbp], xmm0 ; 118 : _mm_castps_pd(right[i].f32_x[5])); ; 119 : register __m128d c6 = _mm_add_pd(_mm_castps_pd(left[i].f32_x[6]), 0023b 48 69 45 08 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 00243 48 8b 8d 88 02 00 00 mov rcx, QWORD PTR right$[rbp] 0024a 48 03 c8 add rcx, rax 0024d 48 8b c1 mov rax, rcx 00250 b9 10 00 00 00 mov ecx, 16 00255 48 6b c9 06 imul rcx, rcx, 6 00259 0f 10 04 08 movups xmm0, XMMWORD PTR [rax+rcx] 0025d 48 69 45 08 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 00265 48 8b 8d 80 02 00 00 mov rcx, QWORD PTR left$[rbp] 0026c 48 03 c8 add rcx, rax 0026f 48 8b c1 mov rax, rcx 00272 b9 10 00 00 00 mov ecx, 16 00277 48 6b c9 06 imul rcx, rcx, 6 0027b 0f 10 0c 08 movups xmm1, XMMWORD PTR [rax+rcx] 0027f 66 0f 58 c8 addpd xmm1, xmm0 00283 0f 28 c1 movaps xmm0, xmm1 00286 0f 29 85 50 01 00 00 movaps XMMWORD PTR c6$8[rbp], xmm0 ; 120 : _mm_castps_pd(right[i].f32_x[6])); ; 121 : register __m128d c7 = _mm_add_pd(_mm_castps_pd(left[i].f32_x[7]), 0028d 48 69 45 08 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 00295 48 8b 8d 88 02 00 00 mov rcx, QWORD PTR right$[rbp] 0029c 48 03 c8 add rcx, rax 0029f 48 8b c1 mov rax, rcx 002a2 b9 10 00 00 00 mov ecx, 16 002a7 48 6b c9 07 imul rcx, rcx, 7 002ab 0f 10 04 08 movups xmm0, XMMWORD PTR [rax+rcx] 002af 48 69 45 08 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 002b7 48 8b 8d 80 02 00 00 mov rcx, QWORD PTR left$[rbp] 002be 48 03 c8 add rcx, rax 002c1 48 8b c1 mov rax, rcx 002c4 b9 10 00 00 00 mov ecx, 16 002c9 48 6b c9 07 imul rcx, rcx, 7 002cd 0f 10 0c 08 movups xmm1, XMMWORD PTR [rax+rcx] 002d1 66 0f 58 c8 addpd xmm1, xmm0 002d5 0f 28 c1 movaps xmm0, xmm1 002d8 0f 29 85 80 01 00 00 movaps XMMWORD PTR c7$9[rbp], xmm0 ; 122 : _mm_castps_pd(right[i].f32_x[7])); ; 123 : ; 124 : ans[i].f32_x[0] = _mm_castpd_ps(c0); 002df 0f 28 45 30 movaps xmm0, XMMWORD PTR c0$2[rbp] 002e3 48 69 45 08 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 002eb 48 8b 8d 90 02 00 00 mov rcx, QWORD PTR ans$[rbp] 002f2 48 03 c8 add rcx, rax 002f5 48 8b c1 mov rax, rcx 002f8 b9 10 00 00 00 mov ecx, 16 002fd 48 6b c9 00 imul rcx, rcx, 0 00301 0f 11 04 08 movups XMMWORD PTR [rax+rcx], xmm0 ; 125 : ans[i].f32_x[1] = _mm_castpd_ps(c1); 00305 0f 28 45 60 movaps xmm0, XMMWORD PTR c1$3[rbp] 00309 48 69 45 08 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 00311 48 8b 8d 90 02 00 00 mov rcx, QWORD PTR ans$[rbp] 00318 48 03 c8 add rcx, rax 0031b 48 8b c1 mov rax, rcx 0031e b9 10 00 00 00 mov ecx, 16 00323 48 6b c9 01 imul rcx, rcx, 1 00327 0f 11 04 08 movups XMMWORD PTR [rax+rcx], xmm0 ; 126 : ans[i].f32_x[2] = _mm_castpd_ps(c2); 0032b 0f 28 85 90 00 00 00 movaps xmm0, XMMWORD PTR c2$4[rbp] 00332 48 69 45 08 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 0033a 48 8b 8d 90 02 00 00 mov rcx, QWORD PTR ans$[rbp] 00341 48 03 c8 add rcx, rax 00344 48 8b c1 mov rax, rcx 00347 b9 10 00 00 00 mov ecx, 16 0034c 48 6b c9 02 imul rcx, rcx, 2 00350 0f 11 04 08 movups XMMWORD PTR [rax+rcx], xmm0 ; 127 : ans[i].f32_x[3] = _mm_castpd_ps(c3); 00354 0f 28 85 c0 00 00 00 movaps xmm0, XMMWORD PTR c3$5[rbp] 0035b 48 69 45 08 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 00363 48 8b 8d 90 02 00 00 mov rcx, QWORD PTR ans$[rbp] 0036a 48 03 c8 add rcx, rax 0036d 48 8b c1 mov rax, rcx 00370 b9 10 00 00 00 mov ecx, 16 00375 48 6b c9 03 imul rcx, rcx, 3 00379 0f 11 04 08 movups XMMWORD PTR [rax+rcx], xmm0 ; 128 : ans[i].f32_x[4] = _mm_castpd_ps(c4); 0037d 0f 28 85 f0 00 00 00 movaps xmm0, XMMWORD PTR c4$6[rbp] 00384 48 69 45 08 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 0038c 48 8b 8d 90 02 00 00 mov rcx, QWORD PTR ans$[rbp] 00393 48 03 c8 add rcx, rax 00396 48 8b c1 mov rax, rcx 00399 b9 10 00 00 00 mov ecx, 16 0039e 48 6b c9 04 imul rcx, rcx, 4 003a2 0f 11 04 08 movups XMMWORD PTR [rax+rcx], xmm0 ; 129 : ans[i].f32_x[5] = _mm_castpd_ps(c5); 003a6 0f 28 85 20 01 00 00 movaps xmm0, XMMWORD PTR c5$7[rbp] 003ad 48 69 45 08 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 003b5 48 8b 8d 90 02 00 00 mov rcx, QWORD PTR ans$[rbp] 003bc 48 03 c8 add rcx, rax 003bf 48 8b c1 mov rax, rcx 003c2 b9 10 00 00 00 mov ecx, 16 003c7 48 6b c9 05 imul rcx, rcx, 5 003cb 0f 11 04 08 movups XMMWORD PTR [rax+rcx], xmm0 ; 130 : ans[i].f32_x[6] = _mm_castpd_ps(c6); 003cf 0f 28 85 50 01 00 00 movaps xmm0, XMMWORD PTR c6$8[rbp] 003d6 48 69 45 08 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 003de 48 8b 8d 90 02 00 00 mov rcx, QWORD PTR ans$[rbp] 003e5 48 03 c8 add rcx, rax 003e8 48 8b c1 mov rax, rcx 003eb b9 10 00 00 00 mov ecx, 16 003f0 48 6b c9 06 imul rcx, rcx, 6 003f4 0f 11 04 08 movups XMMWORD PTR [rax+rcx], xmm0 ; 131 : ans[i].f32_x[7] = _mm_castpd_ps(c7); 003f8 0f 28 85 80 01 00 00 movaps xmm0, XMMWORD PTR c7$9[rbp] 003ff 48 69 45 08 80 00 00 00 imul rax, QWORD PTR i$1[rbp], 128 ; 00000080H 00407 48 8b 8d 90 02 00 00 mov rcx, QWORD PTR ans$[rbp] 0040e 48 03 c8 add rcx, rax 00411 48 8b c1 mov rax, rcx 00414 b9 10 00 00 00 mov ecx, 16 00419 48 6b c9 07 imul rcx, rcx, 7 0041d 0f 11 04 08 movups XMMWORD PTR [rax+rcx], xmm0 ; 132 : } 00421 e9 13 fc ff ff jmp $LN2@double_buf $LN3@double_buf: ; 133 : } 00426 48 8d a5 68 02 00 00 lea rsp, QWORD PTR [rbp+616] 0042d 5f pop rdi 0042e 5d pop rbp 0042f c3 ret 0 double_buf_add_sse ENDP _TEXT ENDS ; Function compile flags: /Odtp /RTCsu /ZI ; File D:\platform-dev\StgSharp.Native\sn-src\m.bufop.x86.c ; COMDAT float_buf_add_512 _TEXT SEGMENT i$1 = 8 c0$2 = 64 left$ = 432 right$ = 440 ans$ = 448 count$ = 456 float_buf_add_512 PROC ; COMDAT ; 98 : { $LN6: 00000 4c 89 4c 24 20 mov QWORD PTR [rsp+32], r9 00005 4c 89 44 24 18 mov QWORD PTR [rsp+24], r8 0000a 48 89 54 24 10 mov QWORD PTR [rsp+16], rdx 0000f 48 89 4c 24 08 mov QWORD PTR [rsp+8], rcx 00014 41 55 push r13 00016 55 push rbp 00017 57 push rdi 00018 48 81 ec b0 01 00 00 sub rsp, 432 ; 000001b0H 0001f 4c 8d 6c 24 20 lea r13, QWORD PTR [rsp+32] 00024 48 8d 6c 24 60 lea rbp, QWORD PTR [rsp+96] 00029 48 83 e5 c0 and rbp, -64 ; ffffffffffffffc0H 0002d 48 8d 0d 00 00 00 00 lea rcx, OFFSET FLAT:__BAFF6ACF_m@bufop@x86@c 00034 e8 00 00 00 00 call __CheckForDebuggerJustMyCode 00039 90 npad 1 ; 99 : for (size_t i = 0; i < count; i++) { 0003a 48 c7 45 08 00 00 00 00 mov QWORD PTR i$1[rbp], 0 00042 eb 0b jmp SHORT $LN4@float_buf_ $LN2@float_buf_: 00044 48 8b 45 08 mov rax, QWORD PTR i$1[rbp] 00048 48 ff c0 inc rax 0004b 48 89 45 08 mov QWORD PTR i$1[rbp], rax $LN4@float_buf_: 0004f 49 8b 85 c8 01 00 00 mov rax, QWORD PTR count$[r13] 00056 48 39 45 08 cmp QWORD PTR i$1[rbp], rax 0005a 73 7a jae SHORT $LN3@float_buf_ ; 100 : register __m512 c0 = _mm512_add_ps(left[i].f32_z[0], right[i].f32_z[0]); 0005c 48 6b 45 08 40 imul rax, QWORD PTR i$1[rbp], 64 ; 00000040H 00061 49 8b 8d b8 01 00 00 mov rcx, QWORD PTR right$[r13] 00068 48 03 c8 add rcx, rax 0006b 48 8b c1 mov rax, rcx 0006e b9 40 00 00 00 mov ecx, 64 ; 00000040H 00073 48 6b c9 00 imul rcx, rcx, 0 00077 48 6b 55 08 40 imul rdx, QWORD PTR i$1[rbp], 64 ; 00000040H 0007c 4d 8b 85 b0 01 00 00 mov r8, QWORD PTR left$[r13] 00083 4c 03 c2 add r8, rdx 00086 49 8b d0 mov rdx, r8 00089 41 b8 40 00 00 00 mov r8d, 64 ; 00000040H 0008f 4d 6b c0 00 imul r8, r8, 0 00093 62 b1 7c 48 10 04 02 vmovups zmm0, ZMMWORD PTR [rdx+r8] 0009a 62 f1 7c 48 58 04 08 vaddps zmm0, zmm0, ZMMWORD PTR [rax+rcx] 000a1 62 f1 7c 48 11 45 01 vmovups ZMMWORD PTR c0$2[rbp], zmm0 ; 101 : ans[i].f32_z[0] = c0; 000a8 48 6b 45 08 40 imul rax, QWORD PTR i$1[rbp], 64 ; 00000040H 000ad 49 8b 8d c0 01 00 00 mov rcx, QWORD PTR ans$[r13] 000b4 48 03 c8 add rcx, rax 000b7 48 8b c1 mov rax, rcx 000ba b9 40 00 00 00 mov ecx, 64 ; 00000040H 000bf 48 6b c9 00 imul rcx, rcx, 0 000c3 62 f1 7c 48 10 45 01 vmovups zmm0, ZMMWORD PTR c0$2[rbp] 000ca 62 f1 7c 48 11 04 08 vmovups ZMMWORD PTR [rax+rcx], zmm0 ; 102 : } 000d1 e9 6e ff ff ff jmp $LN2@float_buf_ $LN3@float_buf_: ; 103 : } 000d6 49 8d a5 90 01 00 00 lea rsp, QWORD PTR [r13+400] 000dd 5f pop rdi 000de 5d pop rbp 000df 41 5d pop r13 000e1 c3 ret 0 float_buf_add_512 ENDP _TEXT ENDS ; Function compile flags: /Odtp /RTCsu /ZI ; File D:\platform-dev\StgSharp.Native\sn-src\m.bufop.x86.c ; COMDAT float_buf_add_avx _TEXT SEGMENT i$1 = 8 s$2 = 40 c0$3 = 96 c1$4 = 160 left$ = 464 right$ = 472 ans$ = 480 count$ = 488 float_buf_add_avx PROC ; COMDAT ; 87 : { $LN6: 00000 4c 89 4c 24 20 mov QWORD PTR [rsp+32], r9 00005 4c 89 44 24 18 mov QWORD PTR [rsp+24], r8 0000a 48 89 54 24 10 mov QWORD PTR [rsp+16], rdx 0000f 48 89 4c 24 08 mov QWORD PTR [rsp+8], rcx 00014 41 55 push r13 00016 55 push rbp 00017 57 push rdi 00018 48 81 ec d0 01 00 00 sub rsp, 464 ; 000001d0H 0001f 4c 8d 6c 24 20 lea r13, QWORD PTR [rsp+32] 00024 48 8d 6c 24 40 lea rbp, QWORD PTR [rsp+64] 00029 48 83 e5 e0 and rbp, -32 ; ffffffffffffffe0H 0002d 48 8d 0d 00 00 00 00 lea rcx, OFFSET FLAT:__BAFF6ACF_m@bufop@x86@c 00034 e8 00 00 00 00 call __CheckForDebuggerJustMyCode 00039 90 npad 1 ; 88 : for (size_t i = 0; i < count; i++) { 0003a 48 c7 45 08 00 00 00 00 mov QWORD PTR i$1[rbp], 0 00042 eb 0b jmp SHORT $LN4@float_buf_ $LN2@float_buf_: 00044 48 8b 45 08 mov rax, QWORD PTR i$1[rbp] 00048 48 ff c0 inc rax 0004b 48 89 45 08 mov QWORD PTR i$1[rbp], rax $LN4@float_buf_: 0004f 49 8b 85 e8 01 00 00 mov rax, QWORD PTR count$[r13] 00056 48 39 45 08 cmp QWORD PTR i$1[rbp], rax 0005a 0f 83 eb 00 00 00 jae $LN3@float_buf_ ; 89 : size_t s = sizeof(MAT_KERNEL(float)); 00060 48 c7 45 28 40 00 00 00 mov QWORD PTR s$2[rbp], 64 ; 00000040H ; 90 : register __m256 c0 = _mm256_add_ps(left[i].f32_y[0], right[i].f32_y[0]); 00068 48 6b 45 08 40 imul rax, QWORD PTR i$1[rbp], 64 ; 00000040H 0006d 49 8b 8d d8 01 00 00 mov rcx, QWORD PTR right$[r13] 00074 48 03 c8 add rcx, rax 00077 48 8b c1 mov rax, rcx 0007a b9 20 00 00 00 mov ecx, 32 ; 00000020H 0007f 48 6b c9 00 imul rcx, rcx, 0 00083 48 6b 55 08 40 imul rdx, QWORD PTR i$1[rbp], 64 ; 00000040H 00088 4d 8b 85 d0 01 00 00 mov r8, QWORD PTR left$[r13] 0008f 4c 03 c2 add r8, rdx 00092 49 8b d0 mov rdx, r8 00095 41 b8 20 00 00 00 mov r8d, 32 ; 00000020H 0009b 4d 6b c0 00 imul r8, r8, 0 0009f c4 a1 7c 10 04 02 vmovups ymm0, YMMWORD PTR [rdx+r8] 000a5 c5 fc 58 04 08 vaddps ymm0, ymm0, YMMWORD PTR [rax+rcx] 000aa c5 fc 11 45 60 vmovups YMMWORD PTR c0$3[rbp], ymm0 ; 91 : register __m256 c1 = _mm256_add_ps(left[i].f32_y[1], right[i].f32_y[1]); 000af 48 6b 45 08 40 imul rax, QWORD PTR i$1[rbp], 64 ; 00000040H 000b4 49 8b 8d d8 01 00 00 mov rcx, QWORD PTR right$[r13] 000bb 48 03 c8 add rcx, rax 000be 48 8b c1 mov rax, rcx 000c1 b9 20 00 00 00 mov ecx, 32 ; 00000020H 000c6 48 6b c9 01 imul rcx, rcx, 1 000ca 48 6b 55 08 40 imul rdx, QWORD PTR i$1[rbp], 64 ; 00000040H 000cf 4d 8b 85 d0 01 00 00 mov r8, QWORD PTR left$[r13] 000d6 4c 03 c2 add r8, rdx 000d9 49 8b d0 mov rdx, r8 000dc 41 b8 20 00 00 00 mov r8d, 32 ; 00000020H 000e2 4d 6b c0 01 imul r8, r8, 1 000e6 c4 a1 7c 10 04 02 vmovups ymm0, YMMWORD PTR [rdx+r8] 000ec c5 fc 58 04 08 vaddps ymm0, ymm0, YMMWORD PTR [rax+rcx] 000f1 c5 fc 11 85 a0 00 00 00 vmovups YMMWORD PTR c1$4[rbp], ymm0 ; 92 : ans[i].f32_y[0] = c0; 000f9 48 6b 45 08 40 imul rax, QWORD PTR i$1[rbp], 64 ; 00000040H 000fe 49 8b 8d e0 01 00 00 mov rcx, QWORD PTR ans$[r13] 00105 48 03 c8 add rcx, rax 00108 48 8b c1 mov rax, rcx 0010b b9 20 00 00 00 mov ecx, 32 ; 00000020H 00110 48 6b c9 00 imul rcx, rcx, 0 00114 c5 fc 10 45 60 vmovups ymm0, YMMWORD PTR c0$3[rbp] 00119 c5 fc 11 04 08 vmovups YMMWORD PTR [rax+rcx], ymm0 ; 93 : ans[i].f32_y[1] = c1; 0011e 48 6b 45 08 40 imul rax, QWORD PTR i$1[rbp], 64 ; 00000040H 00123 49 8b 8d e0 01 00 00 mov rcx, QWORD PTR ans$[r13] 0012a 48 03 c8 add rcx, rax 0012d 48 8b c1 mov rax, rcx 00130 b9 20 00 00 00 mov ecx, 32 ; 00000020H 00135 48 6b c9 01 imul rcx, rcx, 1 00139 c5 fc 10 85 a0 00 00 00 vmovups ymm0, YMMWORD PTR c1$4[rbp] 00141 c5 fc 11 04 08 vmovups YMMWORD PTR [rax+rcx], ymm0 ; 94 : } 00146 e9 f9 fe ff ff jmp $LN2@float_buf_ $LN3@float_buf_: ; 95 : } 0014b 49 8d a5 b0 01 00 00 lea rsp, QWORD PTR [r13+432] 00152 5f pop rdi 00153 5d pop rbp 00154 41 5d pop r13 00156 c3 ret 0 float_buf_add_avx ENDP _TEXT ENDS ; Function compile flags: /Odtp /RTCsu /ZI ; File D:\platform-dev\StgSharp.Native\sn-src\m.bufop.x86.c ; COMDAT float_buf_add_sse _TEXT SEGMENT i$1 = 8 c0$2 = 48 c1$3 = 96 c2$4 = 144 c3$5 = 192 left$ = 448 right$ = 456 ans$ = 464 count$ = 472 float_buf_add_sse PROC ; COMDAT ; 72 : { $LN6: 00000 4c 89 4c 24 20 mov QWORD PTR [rsp+32], r9 00005 4c 89 44 24 18 mov QWORD PTR [rsp+24], r8 0000a 48 89 54 24 10 mov QWORD PTR [rsp+16], rdx 0000f 48 89 4c 24 08 mov QWORD PTR [rsp+8], rcx 00014 55 push rbp 00015 57 push rdi 00016 48 81 ec c8 01 00 00 sub rsp, 456 ; 000001c8H 0001d 48 8d 6c 24 20 lea rbp, QWORD PTR [rsp+32] 00022 48 8d 0d 00 00 00 00 lea rcx, OFFSET FLAT:__BAFF6ACF_m@bufop@x86@c 00029 e8 00 00 00 00 call __CheckForDebuggerJustMyCode 0002e 90 npad 1 ; 73 : for (size_t i = 0; i < count; i++) { 0002f 48 c7 45 08 00 00 00 00 mov QWORD PTR i$1[rbp], 0 00037 eb 0b jmp SHORT $LN4@float_buf_ $LN2@float_buf_: 00039 48 8b 45 08 mov rax, QWORD PTR i$1[rbp] 0003d 48 ff c0 inc rax 00040 48 89 45 08 mov QWORD PTR i$1[rbp], rax $LN4@float_buf_: 00044 48 8b 85 d8 01 00 00 mov rax, QWORD PTR count$[rbp] 0004b 48 39 45 08 cmp QWORD PTR i$1[rbp], rax 0004f 0f 83 ad 01 00 00 jae $LN3@float_buf_ ; 74 : register __m128 c0 = _mm_add_ps(left[i].f32_x[0], right[i].f32_x[0]); 00055 48 6b 45 08 40 imul rax, QWORD PTR i$1[rbp], 64 ; 00000040H 0005a 48 8b 8d c8 01 00 00 mov rcx, QWORD PTR right$[rbp] 00061 48 03 c8 add rcx, rax 00064 48 8b c1 mov rax, rcx 00067 b9 10 00 00 00 mov ecx, 16 0006c 48 6b c9 00 imul rcx, rcx, 0 00070 48 6b 55 08 40 imul rdx, QWORD PTR i$1[rbp], 64 ; 00000040H 00075 4c 8b 85 c0 01 00 00 mov r8, QWORD PTR left$[rbp] 0007c 4c 03 c2 add r8, rdx 0007f 49 8b d0 mov rdx, r8 00082 41 b8 10 00 00 00 mov r8d, 16 00088 4d 6b c0 00 imul r8, r8, 0 0008c 42 0f 10 04 02 movups xmm0, XMMWORD PTR [rdx+r8] 00091 0f 58 04 08 addps xmm0, XMMWORD PTR [rax+rcx] 00095 0f 29 45 30 movaps XMMWORD PTR c0$2[rbp], xmm0 ; 75 : register __m128 c1 = _mm_add_ps(left[i].f32_x[1], right[i].f32_x[1]); 00099 48 6b 45 08 40 imul rax, QWORD PTR i$1[rbp], 64 ; 00000040H 0009e 48 8b 8d c8 01 00 00 mov rcx, QWORD PTR right$[rbp] 000a5 48 03 c8 add rcx, rax 000a8 48 8b c1 mov rax, rcx 000ab b9 10 00 00 00 mov ecx, 16 000b0 48 6b c9 01 imul rcx, rcx, 1 000b4 48 6b 55 08 40 imul rdx, QWORD PTR i$1[rbp], 64 ; 00000040H 000b9 4c 8b 85 c0 01 00 00 mov r8, QWORD PTR left$[rbp] 000c0 4c 03 c2 add r8, rdx 000c3 49 8b d0 mov rdx, r8 000c6 41 b8 10 00 00 00 mov r8d, 16 000cc 4d 6b c0 01 imul r8, r8, 1 000d0 42 0f 10 04 02 movups xmm0, XMMWORD PTR [rdx+r8] 000d5 0f 58 04 08 addps xmm0, XMMWORD PTR [rax+rcx] 000d9 0f 29 45 60 movaps XMMWORD PTR c1$3[rbp], xmm0 ; 76 : register __m128 c2 = _mm_add_ps(left[i].f32_x[2], right[i].f32_x[2]); 000dd 48 6b 45 08 40 imul rax, QWORD PTR i$1[rbp], 64 ; 00000040H 000e2 48 8b 8d c8 01 00 00 mov rcx, QWORD PTR right$[rbp] 000e9 48 03 c8 add rcx, rax 000ec 48 8b c1 mov rax, rcx 000ef b9 10 00 00 00 mov ecx, 16 000f4 48 6b c9 02 imul rcx, rcx, 2 000f8 48 6b 55 08 40 imul rdx, QWORD PTR i$1[rbp], 64 ; 00000040H 000fd 4c 8b 85 c0 01 00 00 mov r8, QWORD PTR left$[rbp] 00104 4c 03 c2 add r8, rdx 00107 49 8b d0 mov rdx, r8 0010a 41 b8 10 00 00 00 mov r8d, 16 00110 4d 6b c0 02 imul r8, r8, 2 00114 42 0f 10 04 02 movups xmm0, XMMWORD PTR [rdx+r8] 00119 0f 58 04 08 addps xmm0, XMMWORD PTR [rax+rcx] 0011d 0f 29 85 90 00 00 00 movaps XMMWORD PTR c2$4[rbp], xmm0 ; 77 : register __m128 c3 = _mm_add_ps(left[i].f32_x[3], right[i].f32_x[3]); 00124 48 6b 45 08 40 imul rax, QWORD PTR i$1[rbp], 64 ; 00000040H 00129 48 8b 8d c8 01 00 00 mov rcx, QWORD PTR right$[rbp] 00130 48 03 c8 add rcx, rax 00133 48 8b c1 mov rax, rcx 00136 b9 10 00 00 00 mov ecx, 16 0013b 48 6b c9 03 imul rcx, rcx, 3 0013f 48 6b 55 08 40 imul rdx, QWORD PTR i$1[rbp], 64 ; 00000040H 00144 4c 8b 85 c0 01 00 00 mov r8, QWORD PTR left$[rbp] 0014b 4c 03 c2 add r8, rdx 0014e 49 8b d0 mov rdx, r8 00151 41 b8 10 00 00 00 mov r8d, 16 00157 4d 6b c0 03 imul r8, r8, 3 0015b 42 0f 10 04 02 movups xmm0, XMMWORD PTR [rdx+r8] 00160 0f 58 04 08 addps xmm0, XMMWORD PTR [rax+rcx] 00164 0f 29 85 c0 00 00 00 movaps XMMWORD PTR c3$5[rbp], xmm0 ; 78 : ; 79 : ans[i].f32_x[0] = c0; 0016b 48 6b 45 08 40 imul rax, QWORD PTR i$1[rbp], 64 ; 00000040H 00170 48 8b 8d d0 01 00 00 mov rcx, QWORD PTR ans$[rbp] 00177 48 03 c8 add rcx, rax 0017a 48 8b c1 mov rax, rcx 0017d b9 10 00 00 00 mov ecx, 16 00182 48 6b c9 00 imul rcx, rcx, 0 00186 0f 28 45 30 movaps xmm0, XMMWORD PTR c0$2[rbp] 0018a 0f 11 04 08 movups XMMWORD PTR [rax+rcx], xmm0 ; 80 : ans[i].f32_x[1] = c1; 0018e 48 6b 45 08 40 imul rax, QWORD PTR i$1[rbp], 64 ; 00000040H 00193 48 8b 8d d0 01 00 00 mov rcx, QWORD PTR ans$[rbp] 0019a 48 03 c8 add rcx, rax 0019d 48 8b c1 mov rax, rcx 001a0 b9 10 00 00 00 mov ecx, 16 001a5 48 6b c9 01 imul rcx, rcx, 1 001a9 0f 28 45 60 movaps xmm0, XMMWORD PTR c1$3[rbp] 001ad 0f 11 04 08 movups XMMWORD PTR [rax+rcx], xmm0 ; 81 : ans[i].f32_x[2] = c2; 001b1 48 6b 45 08 40 imul rax, QWORD PTR i$1[rbp], 64 ; 00000040H 001b6 48 8b 8d d0 01 00 00 mov rcx, QWORD PTR ans$[rbp] 001bd 48 03 c8 add rcx, rax 001c0 48 8b c1 mov rax, rcx 001c3 b9 10 00 00 00 mov ecx, 16 001c8 48 6b c9 02 imul rcx, rcx, 2 001cc 0f 28 85 90 00 00 00 movaps xmm0, XMMWORD PTR c2$4[rbp] 001d3 0f 11 04 08 movups XMMWORD PTR [rax+rcx], xmm0 ; 82 : ans[i].f32_x[3] = c3; 001d7 48 6b 45 08 40 imul rax, QWORD PTR i$1[rbp], 64 ; 00000040H 001dc 48 8b 8d d0 01 00 00 mov rcx, QWORD PTR ans$[rbp] 001e3 48 03 c8 add rcx, rax 001e6 48 8b c1 mov rax, rcx 001e9 b9 10 00 00 00 mov ecx, 16 001ee 48 6b c9 03 imul rcx, rcx, 3 001f2 0f 28 85 c0 00 00 00 movaps xmm0, XMMWORD PTR c3$5[rbp] 001f9 0f 11 04 08 movups XMMWORD PTR [rax+rcx], xmm0 ; 83 : } 001fd e9 37 fe ff ff jmp $LN2@float_buf_ $LN3@float_buf_: ; 84 : } 00202 48 8d a5 a8 01 00 00 lea rsp, QWORD PTR [rbp+424] 00209 5f pop rdi 0020a 5d pop rbp 0020b c3 ret 0 float_buf_add_sse ENDP _TEXT ENDS END