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add multi predictor support to l4, working for ver 5 of mat parallel

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This commit is contained in:
Youmu Liu
2026-04-09 18:07:49 +08:00
parent 0bad6bb480
commit f7187ca7fd
19 changed files with 653 additions and 187 deletions
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StgSharp.Common/HighPerformance/Memory/L4.Evict.cs
+8 -17
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@@ -42,16 +42,7 @@ namespace StgSharp.HighPerformance.Memory
[MethodImpl(MethodImplOptions.AggressiveInlining)]
private unsafe void AgeAll()
{
Vector128<byte> one = Vector128.Create((byte)0x01);
Vector128<byte> max = Vector128.Create((byte)0x03);
byte* p = (byte*)_eviction;
for (int i = 0; i < CacheLineCount; i += 16)
{
Vector128<byte> v = Sse2.LoadVector128(p + i);
v = Sse2.AddSaturate(v, one);
v = Sse2.Min(v, max);
Sse2.Store(p + i, v);
}
_intrinsic.AgeAll(_eviction);
}
/// <summary>
@@ -69,15 +60,12 @@ namespace StgSharp.HighPerformance.Memory
)
{
int remain = count;
Vector128<byte> one = Vector128.Create((byte)0x01);
Vector128<byte> three = Vector128.Create((byte)0x03);
byte* p = (byte*)_eviction;
for (int i = 0; i < CacheLineCount && remain > 0; i += 16)
for (int i = 0; (i < CacheLineCount) && (remain > 0); i += 16)
{
Vector128<byte> v = Sse2.LoadVector128(p + i);
Vector128<byte> mask = Sse2.CompareEqual(v, three);
int evictMask = Sse2.MoveMask(mask);
while (evictMask != 0 && remain > 0)
int evictMask = _intrinsic.ScanEvict(p + i, three);
while ((evictMask != 0) && (remain > 0))
{
int bitPos = BitOperations.TrailingZeroCount(evictMask);
int index = bitPos + i;
@@ -86,7 +74,10 @@ namespace StgSharp.HighPerformance.Memory
{
// EvictLine(i + index);
_ = _map.TryRemove(head->_origin, out _);
PrefetchPredict.WriteBack(head->_origin, head->_profile, new ReadOnlySpan<byte>((byte*)head->_address, Unsafe.SizeOf<CacheLineData>()));
int id = (int)head->_predictor;
IL4Predict predict = _predictions[id] ??
throw new L4PredictUnregisteredException(id);
predict.WriteBack(head->_origin, head->_profile, new ReadOnlySpan<byte>((byte*)head->_address, Unsafe.SizeOf<CacheLineData>()));
RecycleLine(index);
remain--;
}