fix sever L4 errors

2026-03-17 00:31:52 +08:00
parent f8a879c4da
commit 98d711a3ca
4 changed files with 104 additions and 53 deletions
@@ -36,11 +36,50 @@ namespace StgSharp.HighPerformance.Memory
    public interface IPrefetchPredict
    {

-        int Predict(Span<CacheLinePrediction> node);
+        /// <summary>
+        ///   Writes predicted cache line descriptors into <paramref name="node" />.
+        /// </summary>
+        /// <param name="node">
+        ///   Prediction output buffer.
+        /// </param>
+        /// <param name="count">
+        ///   When this method returns, contains the number of valid entries written to <paramref
+        ///   name="node" />. The value must not exceed <paramref name="node" />.Length.
+        /// </param>
+        /// <returns>
+        ///   <see langword="true" /> if any prediction data was produced; otherwise, <see langword="false"
+        ///   />.
+        /// </returns>
+        bool Predict(Span<CacheLinePrediction> node, out int count);

-        bool Prefetch(nuint origin, ulong policy, nuint cache);
+        /// <summary>
+        ///   Materializes the cache line identified by <paramref name="origin" /> into <paramref
+        ///   name="cache" />.
+        /// </summary>
+        /// <param name="origin">
+        ///   Source address associated with the cache line.
+        /// </param>
+        /// <param name="policy">
+        ///   Mapping policy associated with the cache line.
+        /// </param>
+        /// <param name="cache">
+        ///   Destination cache line buffer.
+        /// </param>
+        void Prefetch(nuint origin, ulong policy, Span<byte> cache);

-        void WriteBack(nuint origin, ulong policy, nuint cache);
+        /// <summary>
+        ///   Writes the cache line in <paramref name="cache" /> back to <paramref name="origin" />.
+        /// </summary>
+        /// <param name="origin">
+        ///   Source address associated with the cache line.
+        /// </param>
+        /// <param name="policy">
+        ///   Mapping policy associated with the cache line.
+        /// </param>
+        /// <param name="cache">
+        ///   Source cache line buffer.
+        /// </param>
+        void WriteBack(nuint origin, ulong policy, ReadOnlySpan<byte> cache);

    }