From 4694fd9433482cc01a9e035b9d989acea74d2064 Mon Sep 17 00:00:00 2001 From: Youmu Liu <105042599+Nitload-NSI@users.noreply.github.com> Date: Wed, 20 May 2026 18:07:21 +0800 Subject: [PATCH] L4 is now a burden --- .../HighPerformance/Memory/L4.Prefetch.cs | 15 +-------------- 1 file changed, 1 insertion(+), 14 deletions(-) diff --git a/StgSharp.Common/HighPerformance/Memory/L4.Prefetch.cs b/StgSharp.Common/HighPerformance/Memory/L4.Prefetch.cs index 26851100..357ff251 100644 --- a/StgSharp.Common/HighPerformance/Memory/L4.Prefetch.cs +++ b/StgSharp.Common/HighPerformance/Memory/L4.Prefetch.cs @@ -96,19 +96,6 @@ namespace StgSharp.HighPerformance.Memory { if ((*_predictCount)[index] > short.MaxValue / 2) { - /* - * EXPERIMENTAL / INTENTIONALLY UNSAFE: - * This code performs a 32-bit atomic operation starting from a short reference. - * - * It is only valid in this specific storage layout because: - * - the runtime is little-endian; - * - arithmetic here does not cause harmful cross-16-bit carry/borrow; - * - the backing storage remains valid and accessible beyond the logical short-array boundary; - * - touching the adjacent 16 bits is acceptable for this allocation layout; - * - misaligned int access is acceptable on the target platform. - * - * This is safe only with the current L4 allocation/layout guarantees. - */ int predictCount = Volatile.Read(ref (*_predictCount)[index]); int mapCount = Volatile.Read(ref (*_mapCount)[index]); int decrement = (int.Min(predictCount, mapCount) + 1) / 2; @@ -146,7 +133,7 @@ namespace StgSharp.HighPerformance.Memory (*_mapCount)[index] = 1; // pre fetch them here - predict.Prefetch(head->Origin, head->Profile, new Span((byte*)(ulong)head->Address, (int)(ulong)head->SizeForAllocator)); + predict.Prefetch(head->Origin, head->Profile, new Span((byte*)(ulong)head->Position, (int)(ulong)head->SizeForAllocator)); _ = _map.TryAddOrSet(address, (nuint)head, out _); } _ = Interlocked.Add(ref _aheadCount, actualCount);