Move some marcros from x86 ro base head

This commit is contained in:
Youmu Liu
2026-06-05 13:32:59 +08:00
parent 94b2d759ae
commit 4336b0ca5a
4 changed files with 38 additions and 25 deletions
-6
View File
@@ -39,12 +39,6 @@ if(SN_RESOLVED_OS_NAME STREQUAL "windows")
set(STGSHARP_OS_TAG win) set(STGSHARP_OS_TAG win)
elseif(SN_RESOLVED_OS_NAME STREQUAL "linux") elseif(SN_RESOLVED_OS_NAME STREQUAL "linux")
set(STGSHARP_OS_TAG linux) set(STGSHARP_OS_TAG linux)
elseif(SN_RESOLVED_OS_NAME STREQUAL "macos")
set(STGSHARP_OS_TAG osx)
elseif(SN_RESOLVED_OS_NAME STREQUAL "ios")
set(STGSHARP_OS_TAG ios)
elseif(SN_RESOLVED_OS_NAME STREQUAL "android")
set(STGSHARP_OS_TAG android)
else() else()
set(STGSHARP_OS_TAG unknown) set(STGSHARP_OS_TAG unknown)
endif() endif()
@@ -0,0 +1,34 @@
#ifndef SN_INTRINSIC_CONTEXT_BASE
#define SN_INTRINSIC_CONTEXT_BASE
// -----------------------------------------------------------------------------
// SIMDID layout helpers (see SIMDID.x86.md)
// bits [3..0] : Root ISA
// bits [7..4] : Manufacture (ISA-specific)
// bits [15..8] : MainLevel (monotonic capability)
// -----------------------------------------------------------------------------
#define SIMDID_SHIFT_ROOT 0
#define SIMDID_SHIFT_MANU 4
#define SIMDID_SHIFT_MAIN 8
#ifndef SIMDID_PACK_ROOT
#define SIMDID_PACK_ROOT(root) (((uint64_t)(root) & 0xFULL) << SIMDID_SHIFT_ROOT)
#define SIMDID_PACK_MANU(manu) (((uint64_t)(manu) & 0xFULL) << SIMDID_SHIFT_MANU)
#define SIMDID_PACK_MAIN(main) (((uint64_t)(main) & 0xFFULL) << SIMDID_SHIFT_MAIN)
#endif
// Root ISA (low nibble)
#define SIMDID_ROOT_UNKNOWN 0x0 // cannot find root isa, error branch
#define SIMDID_ROOT_X86_64 0x1 // support
#define SIMDID_ROOT_AARCH64 0x2 // schedualed
#define SIMDID_ROOT_PPC64LE 0x3 // willing, but no plan yet
#define SIMDID_ROOT_RISCV64 0x4 // willing, but no plan yet
#define SIMDID_ROOT_LOONGARCH 0x5 // willing, but no plan yet
#define SIMDID_MASK_ROOT 0xFULL
#define SIMDID_MASK_MANU (0xFULL << SIMDID_SHIFT_MANU)
#define SIMDID_MASK_MAIN (0xFFULL << SIMDID_SHIFT_MAIN)
#endif
@@ -7,6 +7,7 @@
#include "sn_intrinsic.h" #include "sn_intrinsic.h"
#include "sn_intrinsic.std.h" #include "sn_intrinsic.std.h"
#include "sn_intrinsic.context.base.h"
#ifndef SN_X86_TARGET_ATTR_sse #ifndef SN_X86_TARGET_ATTR_sse
#define SN_STD_TARGET_ATTR_IMPL(T_arch, T_feature) SN_X86_TARGET_ATTR_##T_arch##T_feature #define SN_STD_TARGET_ATTR_IMPL(T_arch, T_feature) SN_X86_TARGET_ATTR_##T_arch##T_feature
@@ -27,32 +28,18 @@
// bits [55..48]: AVX10 Feature // bits [55..48]: AVX10 Feature
// bits [63..56]: uArchHi / Policy (optional) // bits [63..56]: uArchHi / Policy (optional)
// ----------------------------------------------------------------------------- // -----------------------------------------------------------------------------
#define SIMDID_SHIFT_ROOT 0
#define SIMDID_SHIFT_MANU 4
#define SIMDID_SHIFT_MAIN 8
#define SIMDID_SHIFT_AVX512 16 #define SIMDID_SHIFT_AVX512 16
#define SIMDID_SHIFT_AMX 32 #define SIMDID_SHIFT_AMX 32
#define SIMDID_SHIFT_AVX 40 #define SIMDID_SHIFT_AVX 40
#define SIMDID_SHIFT_AVX10 48 #define SIMDID_SHIFT_AVX10 48
#define SIMDID_SHIFT_UARCH 56 #define SIMDID_SHIFT_UARCH 56
#define SIMDID_MASK_ROOT 0xFULL
#define SIMDID_MASK_MANU (0xFULL << SIMDID_SHIFT_MANU)
#define SIMDID_MASK_MAIN (0xFFULL << SIMDID_SHIFT_MAIN)
#define SIMDID_MASK_AVX512 (0xFFFFULL << SIMDID_SHIFT_AVX512) #define SIMDID_MASK_AVX512 (0xFFFFULL << SIMDID_SHIFT_AVX512)
#define SIMDID_MASK_AMX (0xFFULL << SIMDID_SHIFT_AMX) #define SIMDID_MASK_AMX (0xFFULL << SIMDID_SHIFT_AMX)
#define SIMDID_MASK_AVX (0xFFULL << SIMDID_SHIFT_AVX) #define SIMDID_MASK_AVX (0xFFULL << SIMDID_SHIFT_AVX)
#define SIMDID_MASK_AVX10 (0xFFULL << SIMDID_SHIFT_AVX10) #define SIMDID_MASK_AVX10 (0xFFULL << SIMDID_SHIFT_AVX10)
#define SIMDID_MASK_UARCH (0xFFULL << SIMDID_SHIFT_UARCH) #define SIMDID_MASK_UARCH (0xFFULL << SIMDID_SHIFT_UARCH)
// Root ISA (low nibble)
#define SIMDID_ROOT_UNKNOWN 0x0
#define SIMDID_ROOT_X86_64 0x1
#define SIMDID_ROOT_AARCH64 0x2
#define SIMDID_ROOT_PPC64LE 0x3
#define SIMDID_ROOT_RISCV64 0x4
#define SIMDID_ROOT_LOONGARCH 0x5
// Manufacture (x86-64 mapping; other ISAs may reinterpret) // Manufacture (x86-64 mapping; other ISAs may reinterpret)
#define SIMDID_MANU_UNKNOWN 0x0 #define SIMDID_MANU_UNKNOWN 0x0
#define SIMDID_MANU_INTEL 0x1 #define SIMDID_MANU_INTEL 0x1
@@ -120,10 +107,9 @@
#endif #endif
// Pack helpers (define locally to avoid missing macros when included standalone) // Pack helpers (define locally to avoid missing macros when included standalone)
#ifndef SIMDID_PACK_ROOT #ifndef SIMDID_PACK_X86
#define SIMDID_PACK_ROOT(root) (((uint64_t)(root) & 0xFULL) << SIMDID_SHIFT_ROOT) #define SIMDID_PACK_X86(root, manu, main) \
#define SIMDID_PACK_MANU(manu) (((uint64_t)(manu) & 0xFULL) << SIMDID_SHIFT_MANU) (SIMDID_PACK_ROOT(root) | SIMDID_PACK_MANU(manu) | SIMDID_PACK_MAIN(main))
#define SIMDID_PACK_MAIN(main) (((uint64_t)(main) & 0xFFULL) << SIMDID_SHIFT_MAIN)
#define SIMDID_PACK_AVX512(avx512_bits) \ #define SIMDID_PACK_AVX512(avx512_bits) \
(((uint64_t)(avx512_bits) & 0xFFFFULL) << SIMDID_SHIFT_AVX512) (((uint64_t)(avx512_bits) & 0xFFFFULL) << SIMDID_SHIFT_AVX512)
#define SIMDID_PACK_AMX(amx_bits) (((uint64_t)(amx_bits) & 0xFFULL) << SIMDID_SHIFT_AMX) #define SIMDID_PACK_AMX(amx_bits) (((uint64_t)(amx_bits) & 0xFFULL) << SIMDID_SHIFT_AMX)
@@ -3,7 +3,6 @@
#if SN_IS_ARCH(SN_ARCH_X86_64) #if SN_IS_ARCH(SN_ARCH_X86_64)
#include "StgSharpNative.h" #include "StgSharpNative.h"
#include "sn_intrinsic.h"
#include "sn_intrinsic.context.x86.h" #include "sn_intrinsic.context.x86.h"
/* ----------------------------------------------------------------------- /* -----------------------------------------------------------------------