add simd id and cpu id
This commit is contained in:
Youmu Liu
@@ -5,27 +5,30 @@
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#include "sn_intrinsic.h"
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// -----------------------------------------------------------------------------
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// SIMDID layout helpers (see SIMDID.simd.md)
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// SIMDID layout helpers (see SIMDID.x86.md)
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// bits [3..0] : Root ISA
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// bits [7..4] : Manufacture (ISA-specific)
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// bits [15..8] : MainLevel (monotonic capability)
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// bits [31..16]: AVX512 Feature
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// bits [39..32]: AMX Feature
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// bits [63..40]: uArch / Policy (optional)
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// bits [47..40]: AVX Feature
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// bits [63..56]: uArchHi / Policy (optional)
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// -----------------------------------------------------------------------------
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#define SIMDID_SHIFT_ROOT 0
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#define SIMDID_SHIFT_MANU 4
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#define SIMDID_SHIFT_MAIN 8
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#define SIMDID_SHIFT_AVX512 16
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#define SIMDID_SHIFT_AMX 32
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#define SIMDID_SHIFT_UARCH 40
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#define SIMDID_SHIFT_AVX 40
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#define SIMDID_SHIFT_UARCH 56
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#define SIMDID_MASK_ROOT 0xFULL
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#define SIMDID_MASK_MANU (0xFULL << SIMDID_SHIFT_MANU)
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#define SIMDID_MASK_MAIN (0xFFULL << SIMDID_SHIFT_MAIN)
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#define SIMDID_MASK_AVX512 (0xFFFFULL << SIMDID_SHIFT_AVX512)
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#define SIMDID_MASK_AMX (0xFFULL << SIMDID_SHIFT_AMX)
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#define SIMDID_MASK_UARCH (0xFFFFFFULL << SIMDID_SHIFT_UARCH)
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#define SIMDID_MASK_AVX (0xFFULL << SIMDID_SHIFT_AVX)
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#define SIMDID_MASK_UARCH (0xFFULL << SIMDID_SHIFT_UARCH)
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// Root ISA (low nibble)
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#define SIMDID_ROOT_UNKNOWN 0x0
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@@ -46,11 +49,9 @@
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#define SIMDID_MAIN_LVL_NONE 0x00u
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#define SIMDID_MAIN_LVL_SSE 0x01u /* SSE1..SSE4.2 */
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#define SIMDID_MAIN_LVL_AVX2 0x02u
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#define SIMDID_MAIN_LVL_AVX2_FMA 0x03u
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#define SIMDID_MAIN_LVL_AVX2_FMA_F16C 0x04u /* 16-bit scalar/vector ready */
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#define SIMDID_MAIN_LVL_AVX512 0x05u
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#define SIMDID_MAIN_LVL_AMX 0x06u
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#define SIMDID_MAIN_LVL_AVX10 0x07u
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#define SIMDID_MAIN_LVL_AVX512 0x03u
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#define SIMDID_MAIN_LVL_AMX 0x04u
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#define SIMDID_MAIN_LVL_AVX10 0x05u
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#ifndef SIMDID_AVX512_BASE
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#define SIMDID_AVX512_FP16 (1U << 29)
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@@ -67,6 +68,13 @@
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#define SIMDID_AVX512_IMPL_NATIVE (0x2U << SIMDID_AVX512_IMPL_SHIFT)
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#endif
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#ifndef SIMDID_AVX_BASE
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#define SIMDID_AVX (1ULL << 40)
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#define SIMDID_AVX2 (1ULL << 41)
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#define SIMDID_AVX_FMA (1ULL << 42)
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#define SIMDID_AVX_F16C (1ULL << 43)
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#endif
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#ifndef SIMDID_AMX_TILE
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#define SIMDID_AMX_TILE (1ULL << 32)
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#define SIMDID_AMX_INT8 (1ULL << 33)
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@@ -81,14 +89,14 @@
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#define SIMDID_PACK_AVX512(avx512_bits) \
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(((uint64_t)(avx512_bits) & 0xFFFFULL) << SIMDID_SHIFT_AVX512)
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#define SIMDID_PACK_AMX(amx_bits) (((uint64_t)(amx_bits) & 0xFFULL) << SIMDID_SHIFT_AMX)
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#define SIMDID_PACK_AVX(avx_bits) (((uint64_t)(avx_bits) & 0xFFULL) << SIMDID_SHIFT_AVX)
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#define SIMDID_PACK_UARCH(uarch_hi) (((uint64_t)(uarch_hi) & 0xFFULL) << SIMDID_SHIFT_UARCH)
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#endif
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/* Pre-shifted helpers for convenience when constructing SIMDID */
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#define SIMDID_MAIN_ENC_NONE SIMDID_PACK_MAIN(SIMDID_MAIN_LVL_NONE)
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#define SIMDID_MAIN_ENC_SSE SIMDID_PACK_MAIN(SIMDID_MAIN_LVL_SSE)
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#define SIMDID_MAIN_ENC_AVX2 SIMDID_PACK_MAIN(SIMDID_MAIN_LVL_AVX2)
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#define SIMDID_MAIN_ENC_AVX2_FMA SIMDID_PACK_MAIN(SIMDID_MAIN_LVL_AVX2_FMA)
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#define SIMDID_MAIN_ENC_AVX2_FMA_F16C SIMDID_PACK_MAIN(SIMDID_MAIN_LVL_AVX2_FMA_F16C)
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#define SIMDID_MAIN_ENC_AVX512 SIMDID_PACK_MAIN(SIMDID_MAIN_LVL_AVX512)
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#define SIMDID_MAIN_ENC_AMX SIMDID_PACK_MAIN(SIMDID_MAIN_LVL_AMX)
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#define SIMDID_MAIN_ENC_AVX10 SIMDID_PACK_MAIN(SIMDID_MAIN_LVL_AVX10)
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@@ -113,9 +121,9 @@ DECLARE_BUF_PROC_LEFT_RIGHT_ANS(double, sse, , sub);
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DECLARE_BUF_PROC_LEFT_RIGHT_ANS(double, avx, , sub);
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DECLARE_BUF_PROC_LEFT_RIGHT_ANS(double, 512, , sub);
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DECLARE_KER_PROC_RIGHT_ANS(float, sse, transpose);
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DECLARE_KER_PROC_RIGHT_ANS(float, avx, transpose);
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DECLARE_KER_PROC_RIGHT_ANS(float, 512, transpose);
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DECLARE_KER_PROC_RIGHT_ANS(float, sse, , transpose);
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DECLARE_KER_PROC_RIGHT_ANS(float, avx, , transpose);
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DECLARE_KER_PROC_RIGHT_ANS(float, 512, , transpose);
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DECLARE_BUF_PROC_RIGHT_ANS_SCALAR(float, sse, , scalar_mul);
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DECLARE_BUF_PROC_RIGHT_ANS_SCALAR(float, avx, , scalar_mul);
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@@ -133,9 +141,6 @@ DECLARE_BUF_PROC_ANS_SCALAR(double, sse, , fill);
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DECLARE_BUF_PROC_ANS_SCALAR(double, avx, , fill);
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DECLARE_BUF_PROC_ANS_SCALAR(double, 512, , fill);
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#pragma endregion
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#pragma region fma
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DECLARE_PNL_PROC_ANS(float, sse, , clear);
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DECLARE_PNL_PROC_ANS(float, avx, , clear);
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DECLARE_PNL_PROC_ANS(float, 512, , clear);
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@@ -144,10 +149,10 @@ DECLARE_PNL_PROC_ANS(double, sse, , clear);
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DECLARE_PNL_PROC_ANS(double, avx, , clear);
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DECLARE_PNL_PROC_ANS(double, 512, , clear);
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DECLARE_PNL_PROC_LEFT_RIGHT_ANS(float, sse, , fma);
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DECLARE_PNL_PROC_LEFT_RIGHT_ANS(float, avx, , fma);
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DECLARE_PNL_PROC_LEFT_RIGHT_ANS(float, avx, _fma, fma);
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DECLARE_PNL_PROC_LEFT_RIGHT_ANS(float, 512, , fma);
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DECLARE_KER_PROC_LEFT_RIGHT_ANS(float, sse, , fma);
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DECLARE_KER_PROC_LEFT_RIGHT_ANS(float, avx, , fma);
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DECLARE_KER_PROC_LEFT_RIGHT_ANS(float, avx, _fma, fma);
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DECLARE_KER_PROC_LEFT_RIGHT_ANS(float, 512, , fma);
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DECLARE_PNL_PROC_LEFT_RIGHT_ANS(double, sse, , fma);
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DECLARE_PNL_PROC_LEFT_RIGHT_ANS(double, avx, , fma);
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@@ -167,22 +167,23 @@ typedef void(SN_DECL *KER_PROC_RA)(mat_kernel *left, mat_kernel *ans);
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typedef void(SN_DECL *KER_PROC_LRA)(mat_kernel *left, mat_kernel *right, mat_kernel *ans);
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typedef void(SN_DECL *KER_PROC_LAS)(mat_kernel *matrix, mat_kernel *ans, scalar_pack *scalar);
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#define KER_PROC(T_type, T_arch, T_op_name) T_type##_kernel_##T_op_name##_##T_arch
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#define KER_PROC(T_type, T_arch, T_feature, T_op_name) \
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T_type##_kernel_##T_op_name##_##T_arch##T_feature
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#define DECLARE_KER_PROC_LEFT_RIGHT_ANS_SCALAR(T_type, T_arch, T_op_name) \
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INTERNAL void SN_DECL KER_PROC(T_type, T_arch, T_op_name)( \
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MAT_KERNEL(T_type) const *left, MAT_KERNEL(T_type) const *right, \
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#define DECLARE_KER_PROC_LEFT_RIGHT_ANS_SCALAR(T_type, T_arch, T_feature, T_op_name) \
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INTERNAL void SN_DECL KER_PROC(T_type, T_arch, T_feature, T_op_name)( \
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MAT_KERNEL(T_type) const *left, MAT_KERNEL(T_type) const *right, \
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MAT_KERNEL(T_type) *restrict ans, scalar_pack const *scalar)
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#define DECLARE_KER_PROC_RIGHT_ANS_SCALAR(T_type, T_arch, T_op_name) \
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INTERNAL void SN_DECL KER_PROC(T_type, T_arch, T_op_name)( \
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#define DECLARE_KER_PROC_RIGHT_ANS_SCALAR(T_type, T_arch, T_feature, T_op_name) \
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INTERNAL void SN_DECL KER_PROC(T_type, T_arch, T_feature, T_op_name)( \
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MAT_KERNEL(T_type) const *right, MAT_KERNEL(T_type) *restrict ans, \
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scalar_pack const *scalar)
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#define DECLARE_KER_PROC_LEFT_RIGHT_ANS(T_type, T_arch, T_op_name) \
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INTERNAL void SN_DECL KER_PROC(T_type, T_arch, T_op_name)( \
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#define DECLARE_KER_PROC_LEFT_RIGHT_ANS(T_type, T_arch, T_feature, T_op_name) \
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INTERNAL void SN_DECL KER_PROC(T_type, T_arch, T_feature, T_op_name)( \
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MAT_KERNEL(T_type) const *left, MAT_KERNEL(T_type) const *right, \
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MAT_KERNEL(T_type) *restrict ans)
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#define DECLARE_KER_PROC_RIGHT_ANS(T_type, T_arch, T_op_name) \
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INTERNAL void SN_DECL KER_PROC(T_type, T_arch, T_op_name)( \
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#define DECLARE_KER_PROC_RIGHT_ANS(T_type, T_arch, T_feature, T_op_name) \
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INTERNAL void SN_DECL KER_PROC(T_type, T_arch, T_feature, T_op_name)( \
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MAT_KERNEL(T_type) const *right, MAT_KERNEL(T_type) *restrict ans)
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#pragma endregion
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@@ -248,159 +249,4 @@ typedef enum most_advanced_instruction {
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#include "sn_target.h"
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#if SN_IS_ARCH(SN_ARCH_X86_64)
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// -----------------------------------------------------------------------------
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// SIMDID layout helpers (see SIMDID.simd.md)
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// bits [3..0] : Root ISA
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// bits [7..4] : Manufacture (ISA-specific)
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// bits [15..8] : MainLevel (monotonic capability)
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// bits [31..16]: AVX512 Feature
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// bits [39..32]: AMX Feature
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// bits [63..40]: uArch / Policy (optional)
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// -----------------------------------------------------------------------------
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#define SIMDID_SHIFT_ROOT 0
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#define SIMDID_SHIFT_MANU 4
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#define SIMDID_SHIFT_MAIN 8
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#define SIMDID_SHIFT_AVX512 16
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#define SIMDID_SHIFT_AMX 32
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#define SIMDID_SHIFT_UARCH 40
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#define SIMDID_MASK_ROOT 0xFULL
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#define SIMDID_MASK_MANU (0xFULL << SIMDID_SHIFT_MANU)
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#define SIMDID_MASK_MAIN (0xFFULL << SIMDID_SHIFT_MAIN)
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#define SIMDID_MASK_AVX512 (0xFFFFULL << SIMDID_SHIFT_AVX512)
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#define SIMDID_MASK_AMX (0xFFULL << SIMDID_SHIFT_AMX)
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#define SIMDID_MASK_UARCH (0xFFFFFFULL << SIMDID_SHIFT_UARCH)
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// Root ISA (low nibble)
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#define SIMDID_ROOT_UNKNOWN 0x0
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#define SIMDID_ROOT_X86_64 0x1
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#define SIMDID_ROOT_AARCH64 0x2
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#define SIMDID_ROOT_PPC64LE 0x3
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#define SIMDID_ROOT_APPLESILICON 0x4
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#define SIMDID_ROOT_RISCV64 0x5
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#define SIMDID_ROOT_LOONGARCH 0x6
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// Manufacture (x86-64 mapping; other ISAs may reinterpret)
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#define SIMDID_MANU_UNKNOWN 0x0
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#define SIMDID_MANU_INTEL 0x1
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#define SIMDID_MANU_AMD 0x2
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#define SIMDID_MANU_VIA 0x3
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// MainLevel (ordinal, shared bits 8..15; not bit-flags)
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#define SIMDID_MAIN_LVL_NONE 0x00u
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#define SIMDID_MAIN_LVL_SSE 0x01u /* SSE1..SSE4.2 */
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#define SIMDID_MAIN_LVL_AVX2 0x02u
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#define SIMDID_MAIN_LVL_AVX2_FMA 0x03u
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#define SIMDID_MAIN_LVL_AVX2_FMA_F16C 0x04u /* 16-bit scalar/vector ready */
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#define SIMDID_MAIN_LVL_AVX512 0x05u
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#define SIMDID_MAIN_LVL_AMX 0x06u
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#define SIMDID_MAIN_LVL_AVX10 0x07u
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/* Pre-shifted helpers for convenience when constructing SIMDID */
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#define SIMDID_MAIN_ENC_NONE SIMDID_PACK_MAIN(SIMDID_MAIN_LVL_NONE)
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#define SIMDID_MAIN_ENC_SSE SIMDID_PACK_MAIN(SIMDID_MAIN_LVL_SSE)
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#define SIMDID_MAIN_ENC_AVX2 SIMDID_PACK_MAIN(SIMDID_MAIN_LVL_AVX2)
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#define SIMDID_MAIN_ENC_AVX2_FMA SIMDID_PACK_MAIN(SIMDID_MAIN_LVL_AVX2_FMA)
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#define SIMDID_MAIN_ENC_AVX2_FMA_F16C SIMDID_PACK_MAIN(SIMDID_MAIN_LVL_AVX2_FMA_F16C)
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#define SIMDID_MAIN_ENC_AVX512 SIMDID_PACK_MAIN(SIMDID_MAIN_LVL_AVX512)
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#define SIMDID_MAIN_ENC_AMX SIMDID_PACK_MAIN(SIMDID_MAIN_LVL_AMX)
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#define SIMDID_MAIN_ENC_AVX10 SIMDID_PACK_MAIN(SIMDID_MAIN_LVL_AVX10)
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#pragma region matix function
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INTERNAL void f32_normalize(VEC(float) * source, VEC(float) * target);
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DECLARE_BUF_PROC_LEFT_RIGHT_ANS(float, sse, , add);
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DECLARE_BUF_PROC_LEFT_RIGHT_ANS(float, avx, , add);
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DECLARE_BUF_PROC_LEFT_RIGHT_ANS(float, 512, , add);
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DECLARE_BUF_PROC_LEFT_RIGHT_ANS(double, sse, , add);
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DECLARE_BUF_PROC_LEFT_RIGHT_ANS(double, avx, , add);
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DECLARE_BUF_PROC_LEFT_RIGHT_ANS(double, 512, , add);
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DECLARE_BUF_PROC_LEFT_RIGHT_ANS(float, sse, , sub);
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DECLARE_BUF_PROC_LEFT_RIGHT_ANS(float, avx, , sub);
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DECLARE_BUF_PROC_LEFT_RIGHT_ANS(float, 512, , sub);
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DECLARE_BUF_PROC_LEFT_RIGHT_ANS(double, sse, , sub);
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DECLARE_BUF_PROC_LEFT_RIGHT_ANS(double, avx, , sub);
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DECLARE_BUF_PROC_LEFT_RIGHT_ANS(double, 512, , sub);
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DECLARE_KER_PROC_RIGHT_ANS(float, sse, transpose);
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DECLARE_KER_PROC_RIGHT_ANS(float, avx, transpose);
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DECLARE_KER_PROC_RIGHT_ANS(float, 512, transpose);
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DECLARE_BUF_PROC_RIGHT_ANS_SCALAR(float, sse, , scalar_mul);
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DECLARE_BUF_PROC_RIGHT_ANS_SCALAR(float, avx, , scalar_mul);
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DECLARE_BUF_PROC_RIGHT_ANS_SCALAR(float, 512, , scalar_mul);
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DECLARE_BUF_PROC_RIGHT_ANS_SCALAR(double, sse, , scalar_mul);
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DECLARE_BUF_PROC_RIGHT_ANS_SCALAR(double, avx, , scalar_mul);
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DECLARE_BUF_PROC_RIGHT_ANS_SCALAR(double, 512, , scalar_mul);
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DECLARE_BUF_PROC_ANS_SCALAR(float, sse, , fill);
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DECLARE_BUF_PROC_ANS_SCALAR(float, avx, , fill);
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DECLARE_BUF_PROC_ANS_SCALAR(float, 512, , fill);
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DECLARE_BUF_PROC_ANS_SCALAR(double, sse, , fill);
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DECLARE_BUF_PROC_ANS_SCALAR(double, avx, , fill);
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DECLARE_BUF_PROC_ANS_SCALAR(double, 512, , fill);
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#pragma endregion
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#pragma region fma
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DECLARE_PNL_PROC_ANS(float, sse, , clear);
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DECLARE_PNL_PROC_ANS(float, avx, , clear);
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DECLARE_PNL_PROC_ANS(float, 512, , clear);
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DECLARE_PNL_PROC_ANS(double, sse, , clear);
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DECLARE_PNL_PROC_ANS(double, avx, , clear);
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DECLARE_PNL_PROC_ANS(double, 512, , clear);
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DECLARE_PNL_PROC_LEFT_RIGHT_ANS(float, sse, , fma);
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DECLARE_PNL_PROC_LEFT_RIGHT_ANS(float, avx, , fma);
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DECLARE_PNL_PROC_LEFT_RIGHT_ANS(float, avx, _fma, fma);
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DECLARE_PNL_PROC_LEFT_RIGHT_ANS(float, 512, , fma);
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DECLARE_PNL_PROC_LEFT_RIGHT_ANS(double, sse, , fma);
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DECLARE_PNL_PROC_LEFT_RIGHT_ANS(double, avx, , fma);
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DECLARE_PNL_PROC_LEFT_RIGHT_ANS(double, avx, _fma, fma);
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DECLARE_PNL_PROC_LEFT_RIGHT_ANS(double, 512, , fma);
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#pragma endregion
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#pragma region scaler_simd
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INTERNAL uint64_t SN_DECL factorial_simd_sse(int n);
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#pragma endregion
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#pragma region dot_product
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INTERNAL void FORCEINLINE SN_DECL dot_41_sse(MAT_KERNEL(float) const *transpose,
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__m128 const *vector, __m128 *ans);
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INTERNAL void SN_DECL dot_41_avx(MAT_KERNEL(float) const *transpose, __m128 const *vector,
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__m128 *ans);
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INTERNAL void SN_DECL dot_42_sse(MAT_KERNEL(float) const *transpose, __m128 const *vector,
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__m128 *ans);
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INTERNAL void SN_DECL dot_42_avx(MAT_KERNEL(float) const *transpose, __m128 const *vector,
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__m128 *ans);
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#pragma endregion
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#pragma region string
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INTERNAL int SN_DECL city_hash_simplify_sse(byte const *str, int length);
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INTERNAL int SN_DECL index_pair_sse(short const *stram, uint32_t target, int length);
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#pragma endregion
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#else
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typedef enum intrinsic_level { SIMD0 = 0 } intrinsic_level;
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#endif
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#endif
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@@ -56,7 +56,7 @@
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typedef union SIMDID {
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uint64_t mask;
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char make_byte[];
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char make_byte[8];
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} SIMDID;
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SN_API SIMDID SN_DECL sn_get_simd_level();
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