left and right use diff pack kernel
This commit is contained in:
@@ -1,5 +1,6 @@
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#include "sn_target.h"
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/* clang-format off */
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#include <immintrin.h>
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#if SN_IS_ARCH(SN_ARCH_X86_64)
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// #include "sn_intrinsic.h"
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@@ -11,89 +12,6 @@
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#define _FMA_SELECT(i) _MM_SHUFFLE(i, i, i, i)
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// float
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/*
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* pack left matrix data to L4 buffer
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* scalar pack carries column length and offset data:
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* [column length, buffer requires, empty, empty]
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*/
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SN_MK_PROC_DECL_STD(float, sse, , fma_pack_left)
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{
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__mk_param_std(RIGHT_ANS_SCALAR, float);
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// for SSE branch, no need for rounding, a direct copy is sufficient as long as the buffer is large enough to hold the packed data
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memcpy(ans, right + offset_1, sizeof(MAT_KERNEL(float)) * count_2);
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}
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SN_MK_PROC_DECL_STD(float, avx, , fma_pack_left)
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{
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__mk_param_std(RIGHT_ANS_SCALAR, float);
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size_t i=0;
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for(; i <= count_1; i+=2) {
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register __m256 ker_0_left = _mm256_load_ps((float *)&right[offset_1 + i].y[0]);
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register __m256 ker_0_right = _mm256_load_ps((float *)&right[offset_1 + i].y[1]);
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register __m256 ker_1_left = _mm256_load_ps((float *)&right[offset_1 + i].y[0]);
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register __m256 ker_1_right = _mm256_load_ps((float *)&right[offset_1 + i].y[1]);
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register __m256 col_0 = _mm256_unpacklo_ps(ker_0_left, ker_1_left);
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register __m256 col_1 = _mm256_unpackhi_ps(ker_0_left, ker_1_left);
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register __m256 col_2 = _mm256_unpacklo_ps(ker_0_right, ker_1_right);
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register __m256 col_3 = _mm256_unpackhi_ps(ker_0_right, ker_1_right);
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_mm256_store_ps((float *)&ans[i].y[0], col_0);
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_mm256_store_ps((float *)&ans[i].y[1], col_1);
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_mm256_store_ps((float *)&ans[i].y[2], col_2);
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_mm256_store_ps((float *)&ans[i].y[3], col_3);
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}
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if(count_1 == i) {
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register __m256 ker_0_left = _mm256_load_ps((float *)&right[offset_1 + i].y[0]);
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register __m256 ker_0_right = _mm256_load_ps((float *)&right[offset_1 + i].y[1]);
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register __m256 zero = _mm256_setzero_ps();
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register __m256 col_0 = _mm256_unpacklo_ps(ker_0_left, zero);
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register __m256 col_1 = _mm256_unpackhi_ps(ker_0_left, zero);
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register __m256 col_2 = _mm256_unpacklo_ps(ker_0_right, zero);
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register __m256 col_3 = _mm256_unpackhi_ps(ker_0_right, zero);
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_mm256_store_ps((float *)&ans[i].y[0], col_0);
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_mm256_store_ps((float *)&ans[i].y[1], col_1);
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_mm256_store_ps((float *)&ans[i].y[2], col_2);
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_mm256_store_ps((float *)&ans[i].y[3], col_3);
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}
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}
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SN_MK_PROC_DECL_STD(float, 512, , fma_pack_left)
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{
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__mk_param_std(RIGHT_ANS_SCALAR, float);
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size_t i=0;
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for(; i <= count_1; i+=2) {
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register __m512 ker_0_left = _mm512_load_ps((float *)&right[offset_1 + i].z[0]);
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register __m512 ker_0_right = _mm512_load_ps((float *)&right[offset_1 + i].z[1]);
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register __m512 ker_1_left = _mm512_load_ps((float *)&right[offset_1 + i].z[0]);
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register __m512 ker_1_right = _mm512_load_ps((float *)&right[offset_1 + i].z[1]);
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register __m512 col_0 = _mm256_unpacklo_ps(ker_0_left, ker_1_left);
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register __m512 col_1 = _mm256_unpackhi_ps(ker_0_left, ker_1_left);
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register __m512 col_2 = _mm256_unpacklo_ps(ker_0_right, ker_1_right);
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register __m512 col_3 = _mm256_unpackhi_ps(ker_0_right, ker_1_right);
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_mm256_store_ps((float *)&ans[i].y[0], col_0);
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_mm256_store_ps((float *)&ans[i].y[1], col_1);
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_mm256_store_ps((float *)&ans[i].y[2], col_2);
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_mm256_store_ps((float *)&ans[i].y[3], col_3);
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}
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if(count_1 == i) {
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register __m256 ker_0_left = _mm256_load_ps((float *)&right[offset_1 + i].y[0]);
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register __m256 ker_0_right = _mm256_load_ps((float *)&right[offset_1 + i].y[1]);
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register __m256 zero = _mm256_setzero_ps();
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register __m256 col_0 = _mm256_unpacklo_ps(ker_0_left, zero);
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register __m256 col_1 = _mm256_unpackhi_ps(ker_0_left, zero);
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register __m256 col_2 = _mm256_unpacklo_ps(ker_0_right, zero);
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register __m256 col_3 = _mm256_unpackhi_ps(ker_0_right, zero);
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_mm256_store_ps((float *)&ans[i].y[0], col_0);
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_mm256_store_ps((float *)&ans[i].y[1], col_1);
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_mm256_store_ps((float *)&ans[i].y[2], col_2);
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_mm256_store_ps((float *)&ans[i].y[3], col_3);
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}
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}
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SN_MK_PROC_DECL_STD(float, sse, , fma)
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{
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@@ -178,12 +96,11 @@ SN_MK_PROC_DECL_STD(float, avx, , fma)
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SN_MK_FMA_F32_AVX2_CYCLE(1);
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SN_MK_FMA_F32_AVX2_CYCLE(2);
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SN_MK_FMA_F32_AVX2_CYCLE(3);
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}
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_mm256_store_ps( (float*)&(ans_cur->y[0]),c0);
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_mm256_store_ps( (float*)&(ans_cur->y[1]),c1);
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_mm256_store_ps( (float*)&(ans_cur->y[2]),c2);
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_mm256_store_ps( (float*)&(ans_cur->y[3]),c3);
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_mm256_store_ps((float *)&(ans_cur->y[0]), c0);
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_mm256_store_ps((float *)&(ans_cur->y[1]), c1);
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_mm256_store_ps((float *)&(ans_cur->y[2]), c2);
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_mm256_store_ps((float *)&(ans_cur->y[3]), c3);
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}
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SN_MK_PROC_DECL_STD(float, avx, _fma, fma)
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@@ -195,7 +112,7 @@ SN_MK_PROC_DECL_STD(float, avx, _fma, fma)
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register __m256 c2 = _mm256_load_ps((float *)&ans_cur->y[2]);
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register __m256 c3 = _mm256_load_ps((float *)&ans_cur->y[3]);
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for (size_t z = 0; z < count_0; z+=2) {
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for (size_t z = 0; z < count_0; z += 2) {
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const SN_MAT_KERNEL_LOCAL *a_base = left + z;
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const SN_MAT_KERNEL_LOCAL *b_base = right + z;
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@@ -213,15 +130,13 @@ SN_MK_PROC_DECL_STD(float, avx, _fma, fma)
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SN_MK_FMA_F32_AVX2_FMA_CYCLE(1);
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SN_MK_FMA_F32_AVX2_FMA_CYCLE(2);
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SN_MK_FMA_F32_AVX2_FMA_CYCLE(3);
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}
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_mm256_store_ps( (float*)&(ans_cur->y[0]),c0);
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_mm256_store_ps( (float*)&(ans_cur->y[1]),c1);
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_mm256_store_ps( (float*)&(ans_cur->y[2]),c2);
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_mm256_store_ps( (float*)&(ans_cur->y[3]),c3);
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_mm256_store_ps((float *)&(ans_cur->y[0]), c0);
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_mm256_store_ps((float *)&(ans_cur->y[1]), c1);
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_mm256_store_ps((float *)&(ans_cur->y[2]), c2);
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_mm256_store_ps((float *)&(ans_cur->y[3]), c3);
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}
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SN_MK_PROC_DECL_STD(float, 512, , fma)
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{
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__mk_param_std(LEFT_RIGHT_ANS, float);
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@@ -231,7 +146,7 @@ SN_MK_PROC_DECL_STD(float, 512, , fma)
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register __m512 c2 = _mm512_load_ps((float *)&ans_cur->z[0]);
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register __m512 c3 = _mm512_load_ps((float *)&ans_cur->z[0]);
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for (size_t z = 0; z < count_0; z+=4) {
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for (size_t z = 0; z < count_0; z += 4) {
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const SN_MAT_KERNEL_LOCAL *a_base = left + z;
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const SN_MAT_KERNEL_LOCAL *b_base = right + z;
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@@ -249,15 +164,13 @@ SN_MK_PROC_DECL_STD(float, 512, , fma)
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SN_MK_FMA_F32_512_CYCLE(1);
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SN_MK_FMA_F32_512_CYCLE(2);
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SN_MK_FMA_F32_512_CYCLE(3);
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}
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_mm512_store_ps((float *)&ans_cur->z[0], c0);
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_mm512_store_ps((float *)&ans_cur->z[1], c1);
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_mm512_store_ps((float *)&ans_cur->z[2], c2);
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_mm512_store_ps((float *)&ans_cur->z[3], c3);
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_mm512_store_ps((float *)&ans_cur->z[0], c0);
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_mm512_store_ps((float *)&ans_cur->z[1], c1);
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_mm512_store_ps((float *)&ans_cur->z[2], c2);
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_mm512_store_ps((float *)&ans_cur->z[3], c3);
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}
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SN_MK_PROC_DECL_STD(double, sse, , fma)
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{
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__mk_param_std(LEFT_RIGHT_ANS, double);
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@@ -436,7 +349,7 @@ SN_MK_PROC_DECL_STD(double, 512, , fma)
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register __m512d c2 = _mm512_load_pd((double *)&ans_cur->z[2]);
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register __m512d c3 = _mm512_load_pd((double *)&ans_cur->z[3]);
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for (size_t z = 0; z < count_0; z+=2) {
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for (size_t z = 0; z < count_0; z += 2) {
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SN_MAT_KERNEL_LOCAL const *right_base = right + z;
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SN_MAT_KERNEL_LOCAL const *left_base = left + z;
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@@ -449,7 +362,7 @@ SN_MK_PROC_DECL_STD(double, 512, , fma)
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register __m512d b1 = _mm512_load_pd((double *)&right_base->z[1]);
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register __m512d b2 = _mm512_load_pd((double *)&right_base->z[2]);
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register __m512d b3 = _mm512_load_pd((double *)&right_base->z[3]);
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SN_MK_FMA_F64_AVX2_CYCLE(0);
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SN_MK_FMA_F64_AVX2_CYCLE(1);
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SN_MK_FMA_F64_AVX2_CYCLE(2);
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