new compute kernel design, less mem read delay
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@@ -5,6 +5,13 @@
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#include "sn_intrinsic.h"
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#include "sn_intrinsic.std.h"
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#ifndef SN_X86_TARGET_ATTR_sse
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#define SN_X86_TARGET_ATTR_sse SN_CLANG_TARGET_ATTR("sse2")
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#define SN_X86_TARGET_ATTR_avx SN_CLANG_TARGET_ATTR("avx")
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#define SN_X86_TARGET_ATTR_avx_fma SN_CLANG_TARGET_ATTR("avx,fma")
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#define SN_X86_TARGET_ATTR_512 SN_CLANG_TARGET_ATTR("avx512f,avx512vl")
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#endif
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// -----------------------------------------------------------------------------
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// SIMDID layout helpers (see SIMDID.x86.md)
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// bits [3..0] : Root ISA
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@@ -105,8 +112,7 @@
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* Higher numeric value == stronger / higher-capability topology. */
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#define SIMDID_UARCH_HYBRID_E (1U << 0) /* E-core (efficiency/small) in a hybrid topology */
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#define SIMDID_UARCH_HYBRID_P (1U << 1) /* P-core (performance/big) in a hybrid topology */
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#define SIMDID_UARCH_SIMD_DUAL \
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(1U << 2) /* SIMD is glued/dual (summary: AVX_DUAL or AVX512_IMPL=DUAL) */
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#define SIMDID_UARCH_SIMD_DUAL (1U << 2) /* SIMD is glued/dual (summary: AVX_DUAL or AVX512_IMPL=DUAL) */
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#endif
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// Pack helpers (define locally to avoid missing macros when included standalone)
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@@ -239,8 +245,8 @@ INTERNAL uint64_t SN_DECL factorial_simd_sse(int n);
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#pragma region dot_product
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INTERNAL void FORCEINLINE SN_DECL dot_41_sse(
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MAT_KERNEL(float) const *transpose, __m128 const *vector, __m128 *ans);
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INTERNAL void FORCEINLINE SN_DECL dot_41_sse(MAT_KERNEL(float) const *transpose,
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__m128 const *vector, __m128 *ans);
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INTERNAL void SN_DECL dot_41_avx(MAT_KERNEL(float) const *transpose, __m128 const *vector,
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__m128 *ans);
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INTERNAL void SN_DECL dot_42_sse(MAT_KERNEL(float) const *transpose, __m128 const *vector,
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